EP910LI-40 vs EP910LI-35Y Comparison
Detailed side-by-side comparison of EP910LI-40 by Altera and EP910LI-35Y by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-40 | EP910LI-35Y |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.90 | $22.75 |
| Manufacturer | Altera (now Intel PSG) | β |
| Product Family | Classic EPLD - EP910 series | β |
| Device Type | Erasable Programmable Logic Device (EPLD) | β |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 36 |
| I/O Pins | 24 bidirectional | 24 |
| Maximum Logic Inputs | 36 | β |
| Product Terms | 240 | β |
| Propagation Delay (tPD) | 40 ns | β |
| Technology | Low-power CMOS (L-suffix) | CMOS EPROM/UV-erasable |
| Operating Temperature | -40C to +85C (industrial, I-suffix) | β |
| Package | PLCC-44 (J-lead, windowed ceramic) | PLCC-44 (J-lead) |
| Mounting Type | Surface Mount (socket-compatible) | Surface Mount |
| Programmability | UV-erasable, JEDEC-standard algorithm | β |
| RoHS Status | Non-compliant (windowed ceramic PLCC, legacy) | Compliant (Y suffix) |
| Lifecycle | Obsolete - replaced by MAX 7000 / MAX II CPLD family | β |
| Family | β | Altera Classic EPLD |
| Usable Gates | β | 450 |
| Propagation Delay (tpd) | β | 35 ns |
| Maximum Frequency (fmax) | β | [DATA_NEEDED: maximum toggle frequency in MHz] |
| Supply Voltage (VCC) | β | 5 V |
| Process Option | β | L (low-power CMOS) |
| Temperature Grade | β | Industrial (-40 Β°C to +85 Β°C) |
| Lead Finish | β | Lead-free (Y suffix, RoHS-compliant) |