EP910LI-40 vs EP910LI-50 Comparison
Detailed side-by-side comparison of EP910LI-40 by Altera and EP910LI-50 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-40 | EP910LI-50 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.90 | $65.00 |
| Manufacturer | Altera (now Intel PSG) | β |
| Product Family | Classic EPLD - EP910 series | β |
| Device Type | Erasable Programmable Logic Device (EPLD) | β |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | β |
| I/O Pins | 24 bidirectional | [DATA_NEEDED: I/O pin count] |
| Maximum Logic Inputs | 36 | β |
| Product Terms | 240 | β |
| Propagation Delay (tPD) | 40 ns | 50 ns |
| Technology | Low-power CMOS (L-suffix) | CMOS, UV-erasable EPROM |
| Operating Temperature | -40C to +85C (industrial, I-suffix) | -40C to +85C (industrial) |
| Package | PLCC-44 (J-lead, windowed ceramic) | β |
| Mounting Type | Surface Mount (socket-compatible) | β |
| Programmability | UV-erasable, JEDEC-standard algorithm | β |
| RoHS Status | Non-compliant (windowed ceramic PLCC, legacy) | [DATA_NEEDED: RoHS status] |
| Lifecycle | Obsolete - replaced by MAX 7000 / MAX II CPLD family | β |
| Family | β | Altera Classic EPLD |
| Usable Gates | β | 450 |
| Package Type | β | CERDIP-40 (L) |
| Package Pin Count | β | 40 |
| Supply Voltage (VCC) | β | 5 V +/- 10% |
| Logic Blocks | β | Classic AND/OR array architecture |
| Programming Method | β | EPROM programmer (UV-erasable window) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| Speed Grade Suffix | β | -50 (50 ns tPD) |