EP910PC-15 vs EP910DC-15 Comparison

Detailed side-by-side comparison of EP910PC-15 by Altera and EP910DC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP910PC-15

EP910PC-15 - 900-Gate Classic EPLD, 15ns PDIP | Altera

EP910PC-15 Obsolete
Altera
EP910DC-15

EP910DC-15 - Classic EPLD 900 Gates 15ns DIP-24 | Altera

EP910DC-15 Obsolete

Specification Comparison

Parameter EP910PC-15 EP910DC-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $12.80 $10.75
Family Altera Classic EPLD Altera Classic EPLD
Usable Gates 900 β€”
Macrocells 24 24
Maximum Pin-to-Pin Delay (tpd) 15 ns β€”
Counter Frequency (fCNT) 100 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 5 V (typical)
Supply Current (Icc) 80 mA typical β€”
Dedicated Inputs 10 12
Dedicated I/O Pins 12 β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
Package 24-pin PDIP (PDIP-24, 0.300 inch) 24-pin ceramic DIP (DC)
Mounting Type Through-Hole Through-Hole
Process Technology CMOS, UV-erasable β€”
Programming Method Altera Logic Programmer card β€”
RoHS Status [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] [DATA_NEEDED: not explicitly stated in verified data]
MSL Level Not applicable (through-hole) [DATA_NEEDED: MSL level]
Device Density β€” 900 usable gates
Logic Elements β€” [DATA_NEEDED: exact LE count]
Bidirectional I/O Pins β€” 12
Flip-Flops β€” 10
Product Terms per Macrocells β€” 24
Maximum Propagation Delay (tPD) β€” 15 ns
Speed Grade β€” 15
Technology β€” CMOS EPROM, UV-erasable

Datasheets & Resources

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