EP910PC-25 vs EP910PC30T Comparison
Detailed side-by-side comparison of EP910PC-25 by Altera and EP910PC30T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC-25 | EP910PC30T |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.92 | $8.85 |
| Product Family | Classic EPLD | β |
| Usable Gates | 900 | β |
| Integration Gates (typical) | 4800 | β |
| Macrocells | 24 | β |
| Pin-to-Pin Delay (tPD) | 25 ns | β |
| Maximum Operating Frequency (fMAX) | 33.3 MHz | β |
| Supply Voltage (VCC) | 5 V +/- 10% | 5 V (4.75 V to 5.25 V) |
| Technology | CMOS EPROM | β |
| Package | PDIP-24 (Plastic DIP) | 24-pin PDIP (PC) |
| Pin Count | 24 | 24 |
| Dedicated Inputs | 10 | β |
| Dedicated I/O Pins | 12 | β |
| TTL Compatibility | 100% TTL emulation | β |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Erasure Method | Not erasable in plastic package (windowless) | β |
| Family | β | Altera Classic EPLD |
| Device Series | β | EP910 |
| Number of Macrocells | β | 24 |
| Number of I/O Pins | β | 24 |
| Number of Dedicated Inputs | β | 12 |
| Maximum Product Terms | β | 240 |
| Propagation Delay (tPD) | β | 30 ns |
| Maximum Clock Frequency (fMAX) | β | 33.3 MHz |
| Process Technology | β | CMOS |
| Programmable Logic Architecture | β | PAL-type sum-of-products, EPLD |
| Mounting Type | β | Through-Hole (THT) |
| Speed Grade | β | -30 (30 ns tPD) |
| Programming Technology | β | EPROM (OTP in plastic package, UV-erasable in windowed package) |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance status] |