EPC1064LC20 vs EPC1441LI20 Comparison
Detailed side-by-side comparison of EPC1064LC20 by Intel and EPC1441LI20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC1064LC20 | EPC1441LI20 |
|---|---|---|
| Brand | Intel | Intel |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $8.10 |
| Memory Size | 65 kb (65,536 bits) | β |
| Memory Type | OTP Configuration PROM (Flash-based, one-time programmable) | OTP Configuration PROM (PROM) |
| Programmable Type | OTP (One-Time Programmable) | β |
| Interface | Serial (Passive Serial / daisy-chain compatible) | β |
| Access Time | 90 ns (approximately 10 MHz) | β |
| Supply Voltage (Operating) | 4.5 V to 5.5 V | β |
| Supply Voltage (Nominal) | 5 V | β |
| Operating Temperature | 0 C to 70 C (Commercial) | -40 C to +85 C (industrial) |
| Package / Case | 20-PLCC (LC) J-lead, 9x9 mm | β |
| No. of Terminals | 20 | β |
| Terminal Finish | Tin/Lead (Sn/Pb) | β |
| Package Code | QCCJ (PLCC-20 J-lead) | β |
| Package Shape | Square | β |
| Compatible Altera FPGA Families | ACEX 1K, APEX 20K, APEX II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | β |
| Configuration Modes Supported | Passive Serial (PS) with FPP up to 100 MHz on newer FPGAs | β |
| RoHS Status | Non-compliant (Sn/Pb finish) | [DATA_NEEDED: RoHS compliance status] |
| MSL Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Lead-Free | No (Sn/Pb terminal finish) | [DATA_NEEDED: lead-free status] |
| Density | β | 441 kbits (440,800 bits) |
| Number of Words | β | 440,800 |
| Bits per Word | β | 1 bit |
| Configuration Interface | β | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Supported FPGA Families | β | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Supply Voltage | β | 3.3 V |
| Package | β | 20-pin PLCC (J-lead, 9x9 mm) |
| Pin Pitch | β | 1.27 mm |
| Programming Method | β | One-Time-Programmable via Altera programming hardware |
| Configuration Time | β | Depends on FPGA bitstream length and DCLK frequency |