EPC144LC-20 vs EPC144LC20 Comparison

Detailed side-by-side comparison of EPC144LC-20 by Altera and EPC144LC20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC144LC-20 EPC144LC20
Brand Altera Intel
Category Memory ICs FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $7.15 $7.10
Memory Type OTP EPROM (One-Time Programmable) β€”
Memory Size 440,800 bits (440 kb) β€”
Configuration Interface Altera serial daisy-chain β€”
Access Time (Speed Grade) 20 ns β€”
Supply Voltage (VCC) [DATA_NEEDED: VCC min/max] 3.0 V to 5.5 V
Supply Voltage (VPP) [DATA_NEEDED: VPP programming voltage] β€”
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
Package Type 20-pin PLCC (J-lead) β€”
Package Dimensions 9 x 9 mm β€”
Mounting Type Surface Mount Surface Mount
Compatible FPGA Families FLEX 10K, FLEX 8000, ACEX 1K β€”
Programming Method Altera Logic Programmer / JTAG In-system via JTAG (IEEE 1149.1 / ByteBlaster / USB-Blaster)
Process Technology CMOS β€”
MSL Level [DATA_NEEDED: MSL rating] 3 (168 hours)
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance status per Intel PCN]
Lead-Free [DATA_NEEDED: lead-free status] Yes
Daisy-Chain Support Yes (multiple PROMs cascadable) β€”
Manufacturer Altera (now Intel FPGA) β€”
Memory Capacity β€” 144 Kbit
Memory Organization β€” Serial (one-time programmable)
Interface Type β€” Altera Serial Configuration (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE)
Configuration Time (typical) β€” [DATA_NEEDED: configuration time at DCLK = 10 MHz]
Active Supply Current β€” [DATA_NEEDED: ICC active]
Standby Supply Current β€” [DATA_NEEDED: ICC standby]
Package β€” 20-pin LCC (Leadless Chip Carrier, JLCC-20)
Pin Count β€” 20
Supported FPGA Families β€” Altera FLEX 6000 / 8000 / 10K, ACEX 1K, MAX 3000 / 7000, APEX 20K
Halogen-Free β€” [DATA_NEEDED]
JTAG Compliance β€” IEEE Std 1149.1

Datasheets & Resources

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