EPC1LC20C vs EPC2LC20 Comparison
Detailed side-by-side comparison of EPC1LC20C by Altera and EPC2LC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC1LC20C | EPC2LC20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.40 | $7.20 |
| Memory Type | Serial Configuration Flash | Non-volatile configuration PROM |
| Memory Size | 1 Mbit (1,048,576 bits) | 1.6 Mbit |
| Configuration Clock (DCLK) | 8 MHz maximum | β |
| Interface | Serial (DATA/DCLK) + JTAG (IEEE 1149.1) | β |
| Supply Voltage | 3.3 V or 5.0 V | β |
| Programmability | In-system via JTAG | β |
| Cascading Support | Yes (nCS, CS pins) | β |
| Package | 20-pin LCC (Leadless Chip Carrier) | 20-pin PLCC (J-lead, 9x9 mm) |
| Mounting Type | Surface Mount (ceramic) | Surface Mount |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Compatible FPGA Families | FLEX 10K, ACEX 1K, APEX 20K | β |
| JTAG Pins | TCK, TMS, TDI, TDO | β |
| Configuration Mode | Slave-serial (FPGA-master) | β |
| MSL Level | MSL3 (ceramic, floor life 168 hours) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Non-Compliant (original Altera Pb-containing part) |
| Configuration Interface | β | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Interface | β | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | β | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | β | 5.0 V or 3.3 V |
| Supported FPGA Families | β | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | β | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Lead-Free Version | β | EPC2LC20N available as lead-free equivalent |
| Programming Support | β | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | β | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |