EPC2L20N vs EPC2LC20CAD Comparison

Detailed side-by-side comparison of EPC2L20N by Altera and EPC2LC20CAD by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPC2LC20CAD

EPC2LC20CAD - 1.6Mb Config PROM for SRAM FPGAs | Altera

EPC2LC20CAD Obsolete

Specification Comparison

Parameter EPC2L20N EPC2LC20CAD
Brand Altera Altera
Category Memory ICs Memory ICs
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $17.20 $9.75
Function In-System Programmable Configuration PROM for SRAM-based LUT FPGAs β€”
Memory Size 1.6 Mbit β€”
Programmable Type In System Programmable (ISP) β€”
Supply Voltage - VCCINT/VCCIO 3.0 V to 3.6 V or 4.5 V to 5.5 V β€”
Package / Case 20-LCC (J-Lead), PLCC-20 β€”
Packaging Tube β€”
Operating Temperature 0C to +70C (commercial) -40C to +85C (commercial)
Supported FPGA Families Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) β€”
Configuration Interface Serial (Altera FPP / PS configuration scheme) β€”
Cascade Support Yes (multi-PROM chain via CE control) β€”
Programming Method In-system via 4-wire ISP / JTAG-style JTAG ISP (no external programmer required)
Mounting Type Surface Mount (J-Lead PLCC) Surface Mount / Through-hole (PLCC socket)
Pin Count 20 20
Lead Finish Matte Tin (Pb-free) β€”
MSL Level 3 (168 hours) β€”
RoHS Status Compliant Compliant
Memory Type β€” Configuration PROM (Flash)
Memory Capacity β€” 1.6 Mbit
Supply Voltage β€” 3.3 V (nominal)
I/O Voltage Tolerance β€” 5 V tolerant
Configuration Mode β€” Serial (bit-wide, Altera FPGAs)
Program Interface β€” IEEE Std 1149.1 JTAG (in-system programmable)
Package β€” 20-pin J-lead PLCC (PLCC-20)
Maximum Input Voltage (DC) β€” -0.3 V to +7.0 V
Input Undershoot/Overshoot β€” -2.0 V to +7.0 V for <100 mA, <20 ns no-load
Compatible FPGA Families β€” APEX 20K, ACEX 1K, Cyclone, Stratix

Datasheets & Resources

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