EPC2LC20 vs EPC1LC20C Comparison
Detailed side-by-side comparison of EPC2LC20 by Altera and EPC1LC20C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC2LC20 | EPC1LC20C |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.20 | $7.40 |
| Memory Type | Non-volatile configuration PROM | Serial Configuration Flash |
| Memory Size | 1.6 Mbit | 1 Mbit (1,048,576 bits) |
| Configuration Interface | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE | β |
| Programming Interface | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant | β |
| Supply Voltage VCC | 3.0 V to 3.6 V (3.3-V operation) | β |
| ISP Voltage Range | 5.0 V or 3.3 V | β |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 | β |
| Cascade Support | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams | β |
| Package | 20-pin PLCC (J-lead, 9x9 mm) | 20-pin LCC (Leadless Chip Carrier) |
| Mounting Type | Surface Mount | Surface Mount (ceramic) |
| Operating Temperature | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] | -40C to +85C (industrial) |
| RoHS Status | Non-Compliant (original Altera Pb-containing part) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Version | EPC2LC20N available as lead-free equivalent | β |
| Programming Support | Altera Programming Unit (APU), Quartus II, JTAG programmer | β |
| Boundary-Scan | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG | β |
| Configuration Clock (DCLK) | β | 8 MHz maximum |
| Interface | β | Serial (DATA/DCLK) + JTAG (IEEE 1149.1) |
| Supply Voltage | β | 3.3 V or 5.0 V |
| Programmability | β | In-system via JTAG |
| Cascading Support | β | Yes (nCS, CS pins) |
| Compatible FPGA Families | β | FLEX 10K, ACEX 1K, APEX 20K |
| JTAG Pins | β | TCK, TMS, TDI, TDO |
| Configuration Mode | β | Slave-serial (FPGA-master) |
| MSL Level | β | MSL3 (ceramic, floor life 168 hours) |