EPC2LC20EM vs EPC2LC20 Comparison
Detailed side-by-side comparison of EPC2LC20EM by Intel and EPC2LC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC2LC20EM | EPC2LC20 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | Active | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.95 | $7.20 |
| Memory Type | Serial Configuration Memory (EPC2 family) | Non-volatile configuration PROM |
| Density | 1.6 Mbit | β |
| Interface | Serial / Parallel configuration, JTAG ISP | β |
| Operating Voltage (Core) | 3.3 V | β |
| Programming Mode | In-system programmable via JTAG (IEEE 1149.1) | β |
| Package Type | PLCC-20 (plastic) | β |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| RoHS Status | [DATA_NEEDED: lead-free / RoHS classification] | Non-Compliant (original Altera Pb-containing part) |
| Configuration Compatibility | Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy | β |
| Data Retention | [DATA_NEEDED: minimum data-retention years] | β |
| Program/Erase Cycles | [DATA_NEEDED: minimum endurance cycles] | β |
| Access Time | [DATA_NEEDED: tOE / tAA in ns] | β |
| Mounting Type | Surface Mount (PLCC socket or solder) | Surface Mount |
| MSL Level | [DATA_NEEDED: moisture sensitivity level] | β |
| Manufacturer Family | EPC2 Enhanced Configuration Device | β |
| Memory Size | β | 1.6 Mbit |
| Configuration Interface | β | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Interface | β | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | β | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | β | 5.0 V or 3.3 V |
| Supported FPGA Families | β | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | β | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Package | β | 20-pin PLCC (J-lead, 9x9 mm) |
| Lead-Free Version | β | EPC2LC20N available as lead-free equivalent |
| Programming Support | β | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | β | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |