EPC2LC20EM vs EPC2LC20ES Comparison

Detailed side-by-side comparison of EPC2LC20EM by Intel and EPC2LC20ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC2LC20EM EPC2LC20ES
Brand Intel Intel
Category FPGA & CPLD Memory ICs
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $7.95 $5.85
Memory Type Serial Configuration Memory (EPC2 family) Configuration PROM (Non-volatile)
Density 1.6 Mbit β€”
Interface Serial / Parallel configuration, JTAG ISP Serial (DCLK/DATA) with JTAG ISP
Operating Voltage (Core) 3.3 V β€”
Programming Mode In-system programmable via JTAG (IEEE 1149.1) β€”
Package Type PLCC-20 (plastic) β€”
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
RoHS Status [DATA_NEEDED: lead-free / RoHS classification] Compliant (ES suffix denotes lead-free industrial)
Configuration Compatibility Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy β€”
Data Retention [DATA_NEEDED: minimum data-retention years] β€”
Program/Erase Cycles [DATA_NEEDED: minimum endurance cycles] β€”
Access Time [DATA_NEEDED: tOE / tAA in ns] β€”
Mounting Type Surface Mount (PLCC socket or solder) Surface Mount / Through-Hole (PLCC socket)
MSL Level [DATA_NEEDED: moisture sensitivity level] β€”
Manufacturer Family EPC2 Enhanced Configuration Device β€”
Memory Size β€” 1.6 Mbit
Target Device β€” SRAM-based FPGAs and LUT devices
Operating Voltage β€” 3.3 V and 5.0 V tolerant
JTAG Standard β€” IEEE Std. 1149.1 compliant
In-System Programmability β€” Yes (via built-in JTAG)
Boundary-Scan Test (BST) β€” Built-in, IEEE 1149.1 compliant
Configuration Modes β€” Serial and parallel supported
Package β€” 20-PLCC (J-lead, 9x9 mm)
Pin Count β€” 20
Programming Interface β€” JTAG (4-wire: TDI/TDO/TMS/TCK)
Manufacturer β€” Intel (formerly Altera)

Datasheets & Resources

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