EPC2LC20NUBAF48 vs EPC2LC20-V Comparison
Detailed side-by-side comparison of EPC2LC20NUBAF48 by Altera and EPC2LC20-V by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPC2LC20NUBAF48
EPC2LC20NUBAF48 - Altera 2Mb Config Device for SRAM FPGAs | FPGA
EPC2LC20NUBAF48 ObsoleteSpecification Comparison
| Parameter | EPC2LC20NUBAF48 | EPC2LC20-V |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.40 | $9.45 |
| Memory Type | Non-volatile flash configuration PROM | Configuration PROM (Flash-based, in-system programmable) |
| Memory Density | 2 Mbit (2,097,152 bits) | 1.6 Mbit |
| Core Supply Voltage (VCC) | 3.3 V (low-voltage 'L' variant) | β |
| I/O Logic Levels | 3.3 V LVCMOS (5V-tolerant inputs) | β |
| Configuration Interface | Altera serial (DATA, DCLK, nCS, ASDO) | Serial (Altera FPP/PS modes via DCLK/nSTATUS/CONF_DONE) |
| JTAG / ISP Support | IEEE 1532 / JTAG in-system programming | β |
| Cascade Support | Yes - dedicated nCASC pin for 2-device chains | Yes, daisy-chainable for >1.6 Mbit designs |
| Programming Voltage | Internal 3.3V generation, no external VPP | β |
| FPGA Compatibility | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 6000 | β |
| Package | 20-pin Ultra FineLine BGA (UBGA, NU suffix) | β |
| Operating Temperature | -40C to +85C (industrial) | β |
| Configuration Clock | Internal oscillator (DCLK output to FPGA) | β |
| Programming Tools | Quartus II Programmer, ByteBlaster II, USB-Blaster | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (per distributor listings) |
| Lead-Free | [DATA_NEEDED: lead-free status] | Yes |
| Maximum Configuration Clock | β | 10 MHz |
| Supply Voltage VCC | β | 3.3 V |
| I/O Tolerance | β | 5 V tolerant on configuration pins |
| In-System Programming | β | Yes, via IEEE 1149.1 JTAG (TMS/TCK/TDI/TDO) |
| Operating Temperature Range (V suffix) | β | 0 Β°C to +70 Β°C (commercial) |
| Package Type | β | 20-pin PLCC (JEDEC MS-018) |
| Package Dimensions | β | 9 x 9 mm body, 1.27 mm pitch |
| Mounting Type | β | Surface Mount (PLCC socket compatible) |
| Supported FPGA Families | β | APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, MAX 9000 |