EPC2LC20NUBAF48 vs EPC2LC20N Comparison
Detailed side-by-side comparison of EPC2LC20NUBAF48 by Altera and EPC2LC20N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPC2LC20NUBAF48
EPC2LC20NUBAF48 - Altera 2Mb Config Device for SRAM FPGAs | FPGA
EPC2LC20NUBAF48 Obsolete
Specification Comparison
| Parameter | EPC2LC20NUBAF48 | EPC2LC20N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.40 | $7.40 |
| Memory Type | Non-volatile flash configuration PROM | Flash |
| Memory Density | 2 Mbit (2,097,152 bits) | β |
| Core Supply Voltage (VCC) | 3.3 V (low-voltage 'L' variant) | β |
| I/O Logic Levels | 3.3 V LVCMOS (5V-tolerant inputs) | β |
| Configuration Interface | Altera serial (DATA, DCLK, nCS, ASDO) | β |
| JTAG / ISP Support | IEEE 1532 / JTAG in-system programming | β |
| Cascade Support | Yes - dedicated nCASC pin for 2-device chains | β |
| Programming Voltage | Internal 3.3V generation, no external VPP | β |
| FPGA Compatibility | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 6000 | β |
| Package | 20-pin Ultra FineLine BGA (UBGA, NU suffix) | 20-pin PLCC (J-Lead, 9x9 mm) |
| Operating Temperature | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Configuration Clock | Internal oscillator (DCLK output to FPGA) | β |
| Programming Tools | Quartus II Programmer, ByteBlaster II, USB-Blaster | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Function | β | In-System Programmable Configuration PROM for SRAM-based FPGAs |
| Memory Size | β | 1.6 Mbit |
| Programmable Type | β | In System Programmable (ISP) |
| Supply Voltage VCCINT | β | 3.0 V to 3.6 V |
| Supply Voltage VCCIO | β | 4.75 V to 5.25 V |
| Configuration Clock Frequency | β | 8 MHz (max) |
| Interface | β | Serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| JTAG Support | β | IEEE 1149.1 / IEEE 1532 compliant |
| Mounting Type | β | Surface Mount |
| Packaging | β | Tube |
| Supported FPGA Families | β | Altera APEX, Cyclone, Stratix, ACEX, MAX 7000 |