EPF10K200EFC672-3 vs EPF10K200SFI672-2 Comparison
Detailed side-by-side comparison of EPF10K200EFC672-3 by Intel and EPF10K200SFI672-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPF10K200EFC672-3 - FLEX 10KE FPGA 9984 Cells 470 I/O BGA-672 | Intel
EPF10K200EFC672-3 ObsoleteSpecification Comparison
| Parameter | EPF10K200EFC672-3 | EPF10K200SFI672-2 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $115.00 | $99.50 |
| Series | FLEX 10KE | β |
| Number of Logic Elements / Cells | 9,984 | β |
| Number of LABs / CLBs | 1248 | β |
| Total RAM Bits | 98,304 bits (12 EABs of 8 Kbits) | β |
| Number of I/O | 470 | β |
| Number of Gates (typical) | 200,000 | β |
| Supply Voltage - Operating | 2.3 V to 2.7 V (2.5 V nominal) | β |
| Process Technology | 0.22 Β΅m CMOS | 0.22 Β΅m (Arrow lists 0.42 Β΅m) |
| Maximum Operating Frequency | 166.67 MHz | β |
| Propagation Delay | 0.4 ns | β |
| Package / Case | 672-BBGA (27 x 27 mm, 1.0 mm pitch, FineLine BGA) | β |
| Mounting Type | Surface Mount | β |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | Industrial (-40C to +85C) |
| Configuration Memory | SRAM-based (volatile, requires external configuration device) | β |
| Number of PLLs | 4 | β |
| RoHS Status | [DATA_NEEDED: rohs status] | Not compliant (per Arrow EU RoHS listing) |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Family | β | FLEX 10KE |
| Logic Elements | β | 9984 |
| System Gates | β | 200000 |
| Logic Array Blocks (LABs) | β | 1248 |
| User I/Os | β | 470 |
| Embedded Array Blocks (EABs) | β | 24 |
| Embedded Memory (EAB SRAM) | β | 96 Kbit |
| Distributed Memory | β | 98304 bits |
| Core Supply Voltage | β | 2.5 V |
| Package | β | 672-pin FineLine BGA (FBGA) |
| Speed Grade | β | -2 |
| JTAG Boundary Scan | β | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | β | PCI Local Bus Specification Rev 2.2 (3.3 V, 33/66 MHz) on -1 speed grade |
| Programming | β | SRAM-based, in-system programmable |