EPM5064LC-1 vs EPM5064LC-2 Comparison

Detailed side-by-side comparison of EPM5064LC-1 by Altera and EPM5064LC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5064LC-1

EPM5064LC-1 - 64-Macrocell 5V CPLD, 44-Pin PLCC | Altera

EPM5064LC-1 Obsolete
Altera
EPM5064LC-2

EPM5064LC-2 - 64-Macrocell MAX 5000 CPLD, 45ns, PLCC44 | Altera

EPM5064LC-2 Obsolete

Specification Comparison

Parameter EPM5064LC-1 EPM5064LC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.95 $8.40
Product Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Family MAX 5000 β€”
Macrocells 64 64
Logic Array Blocks (LABs) 4 4
Usable Gates 1.25K (approx.) β€”
Supply Voltage (VCC) 4.75 V to 5.25 V 4.75 V to 5.25 V (5 V nominal)
Internal Operating Frequency 62.5 MHz β€”
Propagation Delay (tPD) 40 ns 45 ns
Input Lines 36 β€”
Dedicated Inputs 7 β€”
Output Lines 28 β€”
Programming Technology OTP / UV-Erasable EPROM β€”
Package 44-pin PLCC (Plastic Leaded Chip Carrier) PLCC-44 (J-Lead, plastic)
Process Technology CMOS CMOS, OTP EPROM (UV-erasable base)
Operating Temperature [DATA_NEEDED: operating temperature range] -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source]
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: not specified in source]
Programming Interface JTAG (ByteBlaster-compatible) β€”
Device Family β€” MAX 5000
Logic Elements per LAB β€” 16
Number of Inputs β€” 36 (7 dedicated + 28 I/O)
Number of I/O Pins β€” 28
Number of Flip-Flops β€” 28
Maximum Internal Frequency β€” 40 MHz
Programmable Polarity β€” Yes
Programmable Output Enable β€” Yes, per macrocell
Mounting Type β€” Surface Mount
Programming Method β€” Altera byte-wide / JTAG programmer

Datasheets & Resources

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