EPM9320ALI84-10N vs EPM9320ALC84-20 Comparison
Detailed side-by-side comparison of EPM9320ALI84-10N by Altera and EPM9320ALC84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ALI84-10N | EPM9320ALC84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.95 | $10.50 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Architecture | MAX (Multiple Array MatriX), 3rd generation | β |
| Process Technology | CMOS EEPROM | 0.5 Β΅m CMOS EEPROM |
| Usable Gates | 6,000 to 12,000 | β |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 20 | 16 |
| User I/O Pins | 56 | β |
| Pin-to-Pin Delay | 10 ns | β |
| Maximum Counter Frequency | 144.9 MHz | β |
| VCCINT (Core Supply) | 5.0 V | β |
| VCCIO (I/O Supply) | 3.3 V or 5.0 V | β |
| Input Logic Levels | TTL-compatible (at 5.0 V VCCINT) | β |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | β |
| Package | 84-pin PLCC (J-lead, 1.270 mm pitch) | PLCC-84 |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Operating Temperature | -40C to +85C (industrial) | [DATA_NEEDED: commercial or industrial grade] |
| Configuration Memory | EEPROM, non-volatile | Non-volatile EEPROM |
| Maximum User I/Os | β | 212 |
| Pin-to-Pin Delay (tPD) | β | 20 ns |
| Supply Voltage | β | 5.0 V |
| Programmability | β | In-system via IEEE 1149.1 JTAG |
| Boundary Scan | β | JTAG IEEE 1149.1 |
| Design Software | β | MAX+PLUS II / Quartus II (legacy) |
| RoHS Status | β | [DATA_NEEDED: per Altera datasheet] |