LSF0102DDFR - 2-Ch 100Mbps Level Translator | TI
MPN: LSF0102DDFR β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.55 | $0.55 |
| 10 | $0.45 | $4.50 |
| 100 | $0.32 | $32.00 |
| 500 | $0.26 | $130.00 |
| 1,000 | $0.21 | $210.00 |
Drop-in alternatives for LSF0102DDFR β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
LSF0102DDFRQ1
β Drop-Inπ Reference alternative (not in catalog)
LSF0102-Q1
β Drop-Inβ In Stock
Contact for price
View Datasheet βNXS0102GUATXG
β Drop-Inπ Reference alternative (not in catalog)
LSF0102DDFR Maximum Ratings & Electrical Characteristics
| Function | Dual bidirectional multi-voltage level translator |
| Number of Channels | 2 |
| Translation Voltage Range | 0.95 V to 5 V |
| VREF_A Range | 0.9 V to 5.5 V |
| VREF_B Range | 1.8 V to 5.5 V |
| Max Data Rate | 100 Mbps |
| Propagation Delay | 1.2 ns |
| Quiescent Current | 6 uA |
| Output Type | Push-Pull / Open-Drain |
| Direction Control | None (auto-bidirectional) |
| Operating Temperature | -40C to +125C |
| Package | TSOT-23-8 (DDF) |
| Pin Count | 8 |
| Mounting Type | Surface Mount |
| Package Dimensions | 2.9 mm x 1.6 mm x 1.1 mm |
| RoHS Status | Compliant |
| Storage Temperature | -65C to +150C |
LSF0102DDFR Pin Configuration
| Pin 1 | VREF_A β Reference voltage, A-side (0.9V to 5.5V) |
| Pin 2 | A1 β A-side data port 1 |
| Pin 3 | A2 β A-side data port 2 |
| Pin 4 | GND β Ground |
| Pin 5 | EN β Enable (active high; pull to VREF_B to enable) |
| Pin 6 | B2 β B-side data port 2 |
| Pin 7 | B1 β B-side data port 1 |
| Pin 8 | VREF_B β Reference voltage, B-side (1.8V to 5.5V) |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
LSF0102DDFR is suitable for 6 applications: I2C Bus Level Shifting, SPI Interface Translation, UART Level Translation, Battery-Powered Portable Devices, Industrial Mixed-Voltage Control, Automotive ECUs.
I2C Bus Level Shifting
The LSF0102DDFR is purpose-built for I2C level translation between 1.8V, 3.3V, and 5V domains. Its auto-bidirectional pass-gate architecture handles the wired-AND, bidirectional nature of I2C without a direction pin, and its 100 Mbps capability comfortably covers Fast-mode Plus (1 Mbps). Pull-up resistors on each side (4.7 kilohm at 100 kHz, 2 kilohm at 400 kHz) define domain high levels via VREF_A and VREF_B, while the 6 uA quiescent current suits battery-powered sensor buses.
Recommended
SPI Interface Translation
For SPI links between a 3.3V MCU and a 1.8V flash, sensor, or display, the LSF0102DDFR's 100 Mbps data rate and 1.2 ns propagation delay preserve timing margins up to 50 MHz SPI clocks. Two channels serve SCLK and MOSI (or MISO with a second device), with low-value 1-2 kilohm pull-ups needed for push-pull speed. The pass-gate adds negligible capacitive loading, keeping edge rates clean and reducing signal-integrity risk in high-speed mixed-voltage layouts.
Recommended
UART Level Translation
UART links between a 1.8V microcontroller and a 3.3V or 5V modem, GPS, or Bluetooth module are reliably bridged by the LSF0102DDFR. Standard baud rates up to 3 Mbps are far below the 100 Mbps device limit, so standard 4.7 kilohm pull-ups suffice, minimizing power. Auto-bidirectionality means TX and RX each occupy one channel with no firmware direction control. The 6 uA standby current preserves battery life in always-on connected devices.
Recommended
Battery-Powered Portable Devices
In wearables, phones, and IoT nodes, subsystems run at 1.8V for power savings while peripherals may need 3.3V. The LSF0102DDFR's 6 uA quiescent current and tiny 2.9 x 1.6 mm TSOT-23-8 footprint make it ideal for space- and power-constrained designs. Because the pass-gate is passive, no dynamic switching current is drawn during idle bus periods, so leakage across the voltage domains remains negligible during deep-sleep states, extending overall battery runtime.
Recommended
Industrial Mixed-Voltage Control
Industrial controllers frequently mix 5V legacy logic with 3.3V or 1.8V MCUs. The LSF0102DDFR's -40C to +125C operating range and wide 0.95V-5V translation window cover factory-floor temperature extremes and legacy 5V signal levels. Its tolerance of both open-drain buses (SMBus/PMBus power supervisors) and push-pull GPIO lets one translator type serve multiple interfaces on a board, consolidating BOM and simplifying procurement across a controller platform.
Recommended
Automotive ECUs
For automotive gateways and body controllers, the AEC-Q100 qualified LSF0102-Q1 / LSF0102DDFRQ1 variants extend this translator into -40C to +125C (ambient) qualification. Typical uses include translating a 3.3V MCU's I2C to 5V sensors, or bridging 1.8V SoC GPIOs to 3.3V CAN/LIN transceiver standby logic. The 6 uA quiescent draw matters for always-on modules subject to key-off battery-drain budgets specified by OEM electrical system requirements.
Recommended
Recommended Products Summary
Engineering reference data for LSF0102DDFR β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | LSF0102DDFRQ1 | LSF0102-Q1 | NXS0102GUATXG | TXS0102DCUR |
|---|---|---|---|---|---|
| Package | TSOT-23-8 (DDF) | TSOT-23-8 (DDF) - same | TSOT-23-8 (DDF) - same | SOT23-8 - footprint compatible (verify) | VSSOP-8 (DCT) - different package |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Nexperia | Texas Instruments |
| Channels | 2 | 2 | 2 | 2 | 2 |
| Voltage Range | 0.95V to 5V | 0.95V to 5V | 0.95V to 5V | 0.95V to 5V | 1.2V to 3.6V (VCCA) |
| Max Data Rate | 100 Mbps | 100 Mbps | 100 Mbps | [DATA_NEEDED] | 24 Mbps (push-pull) |
| Quiescent Current | 6 uA | 6 uA | 6 uA | [DATA_NEEDED] | 4 uA |
| Direction Pin | None (auto) | None (auto) | None (auto) | None (auto) | None (auto, one-shot) |
| AEC-Q100 | Not qualified | Qualified | Qualified | [DATA_NEEDED] | Not qualified |
| Operating Temperature | -40C to +125C | -40C to +125C | -40C to +125C | -40C to +125C | -40C to +85C |
Key Differentiators
- Widest voltage flexibility via VREF pins (vs TXS0102DCUR)
- Automotive qualified drop-in (vs LSF0102DDFRQ1)
- Passive pass-gate draws only 6 uA (vs TXS0102DCUR)
Design Notes
VREF_B must be at least 1.8V for proper operation, and VREF_A should be set to the lower of the two logic levels. Tie EN to VREF_B for always-on operation; leaving EN floating can leave the pass-gates undefined. Do not use the LSF0102 in applications requiring fully driven CMOS outputs without pull-ups - the pass-gate is passive and output high levels are set entirely by the external pull-up resistors.
Place VREF_A and VREF_B decoupling capacitors (100 nF ceramic) within 2 mm of pins 1 and 8. Keep the translator close to the voltage-domain boundary and route A-side traces only in the A domain and B-side traces in the B domain to minimize crosstalk. The TSOT-23-8 (2.9 x 1.6 mm) land pattern follows the TI DDF footprint; no thermal pad is required.
Pull-up resistor choice sets achievable data rate: RC charging through the pull-up limits rise time. For 100 Mbps push-pull signaling use 1-2 kilohm pull-ups; for 400 kHz I2C use 2-4.7 kilohm; for 100 kHz I2C, 10 kilohm is acceptable and minimizes power. Keep total bus capacitance below 50 pF for open-drain operation to preserve rise-time margin.
Compliance Information
RoHS compliance confirmed via DigiKey and LCSC/JLCPCB listings. Use LSF0102DDFRQ1 for AEC-Q100 automotive requirements.
