LP38843 - 3A Ultra-Low Dropout LDO with Enable | TI
MPN: LP38843 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.45 | $2.45 |
| 10 | $2.21 | $22.10 |
| 100 | $1.86 | $186.00 |
| 500 | $1.58 | $790.00 |
| 1,000 | $1.35 | $1,350.00 |
Drop-in alternatives for LP38843 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
LP38843T-1.2
β Drop-Inπ Reference alternative (not in catalog)
LP38843S-1.2/NOPB
β Drop-Inπ Reference alternative (not in catalog)
LP38842T-1.2
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
LP38852T-1.2
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
LT1965
β‘ Same Package β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
LP38843 Maximum Ratings & Electrical Characteristics
| Output Type | Positive Fixed |
| Output Current | 3 A |
| Minimum Input Voltage (Vin) | 1.01 V |
| Dropout Voltage | Ultra-low dropout (N-MOS pass transistor) |
| Number of Outputs | 1 |
| Enable Pin | Yes |
| Output Capacitor Stability | Stable with ceramic output capacitors |
| Package | TO-220-5 (NDZ), TO-263 (KTT) |
| Mounting Type | Through Hole (TO-220-5) / Surface Mount (TO-263) |
| Process Technology | CMOS with N-MOS power transistor |
| Fixed Output Options | 1.2 V, 1.5 V (order code dependent) |
LP38843 Pin Configuration
| Pin 1 | VIN β Input voltage supply (down to 1.01V) |
| Pin 2 | GND β Ground |
| Pin 3 | EN β Enable input, actively drive - do not float |
| Pin 4 | VBIAS β Bias supply to drive N-MOS gate (2.7V-5.5V typical) |
| Pin 5 | VOUT β Regulated fixed output, connect ceramic output capacitor |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this component. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
LP38843 is suitable for 6 applications: DSP Core Power Supply, Point-of-Load Regulation on Telecom Cards, Post-Regulation of Switching Converters, FPGA and Processor I/O Rails, Industrial Control and Automation Supplies, Test and Measurement Instrumentation.
DSP Core Power Supply
DSP cores such as TI C2000 series require tightly regulated 1.2V/1.5V rails with high current and fast transient response. The LP38843 delivers 3A from a minimum Vin of 1.01V, and its N-MOS CMOS topology provides an extremely low dropout so the rail stays in regulation even when the upstream 1.8V rail sags. The fast loop response handles zero-to-full-load steps without excessive undershoot, and the enable pin lets a sequencer stagger core and I/O rails, protecting the DSP from latch-up conditions during power-up.
Recommended
Point-of-Load Regulation on Telecom Cards
Telecom and networking line cards distribute a mid-rail bus and generate low-voltage local rails for ASICs and PHYs. The LP38843 fits as a point-of-load 3A LDO where headroom is small: Vin can fall to 1.01V while Vbias rides a higher 2.7V-5.5V aux rail to drive the N-MOS gate. This dual-supply arrangement wastes minimal power in dropout and, unlike a second buck stage, adds no switching noise near sensitive receive circuitry, simplifying EMI design on dense cards.
Recommended
Post-Regulation of Switching Converters
After a buck converter, residual switching ripple in the 100 kHz-MHz range can degrade ADC and PLL noise floors. The LP38843 placed as a post-regulator strips this ripple with its high PSRR and low noise while supplying up to 3A. It is stable with inexpensive ceramic output capacitors, keeping the post-regulation stage compact and low-cost. Design the dropout budget so the buck output sits only 200-400mV above the LDO output to limit power dissipation at full load.
Recommended
FPGA and Processor I/O Rails
FPGA I/O banks commonly need fixed 1.5V rails at 1-3A with tight DC accuracy. The LP38843 fixed-output versions (1.2V, 1.5V) simplify the BOM with no feedback divider, and the enable pin supports power sequencing between VCCIO and VCCINT rails required by FPGA vendors. Because the part is stable with ceramic capacitors, multiple LP38843 channels can be placed close to FPGA banks, minimizing trace inductance and improving transient behavior during simultaneous switching outputs.
Recommended
Industrial Control and Automation Supplies
Industrial controllers require rugged point-of-load regulation tolerant of supply variation. The LP38843 operates from a minimum Vin of 1.01V and survives low-line conditions during brownouts, keeping logic rails alive. The enable pin supports controlled shutdown for safety sequencing, and the TO-220-5 package simplifies thermal design with its tab connected to ground for heatsinking. Ceramic-capacitor stability also improves long-term reliability by avoiding electrolytic capacitors in high-vibration environments.
Recommended
Test and Measurement Instrumentation
Bench instruments and ATE boards need clean, high-current local rails with predictable behavior. The LP38843's CMOS N-MOS architecture yields low ground current and low dropout, so calibration drifts from self-heating are minimized. Its fast transient response makes it suitable for feeding clock distribution and ADC reference buffers that see dynamic loads. In TO-263 (KTT) surface mount, it integrates into automated assembly, and the enable pin allows per-board rail bring-up under software control during self-test.
Recommended
Recommended Products Summary
Engineering reference data for LP38843 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | LP38843T-1.2 | LP38843S-1.2/NOPB | LP38842T-1.2 | LT1965 |
|---|---|---|---|---|---|
| Package | TO-220-5 (NDZ) / TO-263 (KTT) | TO-220-5 (NDZ) - same | TO-263 (KTT) - same family | TO-220-5 (NDZ) - same | TO-220-5 - same package, different pinout |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Analog Devices |
| Output Current | 3 A | 3 A | 3 A | 3 A | 1.5 A |
| Minimum Input Voltage | 1.01 V | 1.01 V | 1.01 V | 1.01 V | [DATA_NEEDED] |
| Enable Pin | Yes | Yes | Yes | No | [DATA_NEEDED] |
| Dual Supply (Vin + Vbias) | Yes | Yes | Yes | Yes | No (single supply) |
| Ceramic Output Capacitor Stable | Yes | Yes | Yes | Yes | [DATA_NEEDED] |
| Fixed Output Options | 1.2 V, 1.5 V | 1.2 V | 1.2 V | 1.2 V | Adjustable/fixed [DATA_NEEDED] |
Key Differentiators
- Enable pin for rail sequencing (vs LP38842T-1.2)
- Higher 3A output current (vs LT1965)
- Extremely low minimum Vin of 1.01V (vs LP38843S-1.2/NOPB)
Design Notes
The LP38843 requires Vbias to be present and above its UVLO before or simultaneously with Vin, since Vbias drives the N-MOS pass transistor gate. If Vbias comes up late, the output will not regulate even with Vin present. In sequenced systems, use the EN pin with a supervisor to guarantee correct ordering, and never leave EN floating - drive it actively from logic or a pull-up.
At 3A output, power dissipation equals (Vin - Vout) x 3A plus bias power. For example, dropping 1.8V to 1.2V at 3A dissipates 1.8W. The TO-220-5 tab (at ground potential) should be mounted to a heatsink or a generous copper pour; for TO-263, use at least 1 square inch of PCB copper on the thermal plane. Verify junction temperature stays within datasheet limits at worst-case ambient.
Place a ceramic output capacitor close to the VOUT pin; the device is stable with ceramics, but keep trace inductance low for good transient response. Input capacitance on both VIN and VBIAS should also sit near their pins. Keep the high-current VIN-to-VOUT path wide and short, and route EN away from the power loop to avoid glitching during load transients.
Compliance Information
NOPB suffix on TI order codes denotes No Pb (lead-free) plating; verify full RoHS/REACH status on TI product page.
