10AX090R4F40I3LG - 900K LE Arria 10 GX FPGA, 1517-FCBGA | Intel
MPN: 10AX090R4F40I3LG ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7244.37 | $7,244.37 |
| 10 | $6895.12 | $68,951.20 |
| 100 | $6420.5 | $642,050.00 |
| 500 | $6015.88 | $3,007,940.00 |
| 1,000 | $5690 | $5,690,000.00 |
Drop-in alternatives for 10AX090R4F40I3LG — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
10AX090R4F40E3LG
✅ Drop-In✓ In Stock
$4415.91 / Unit
View Datasheet →10AX090R3F40I2LG
✅ Drop-In✓ In Stock
$3640 / Unit
View Datasheet →10AX090N4F40I3LG
✅ Drop-In✓ In Stock
$3290 / Unit
View Datasheet →10AX090R3F40I2SG
✅ Drop-In ⚠️ 参数待验证✓ In Stock
$4133.96 / Unit
View Datasheet →10AX090R2F40I2LG
✅ Drop-In ⚠️ 参数待验证✓ In Stock
Contact for price
View Datasheet →10AX090R4F40I3LG Maximum Ratings & Electrical Characteristics
| Family | Arria 10 GX |
| Logic Elements (LE) | 900,000 |
| Embedded Memory (bits) | 59,234,304 |
| DSP Blocks | 1,518 |
| User I/O Count | 342 |
| Transceivers | 24 channels up to 14.4 Gbps |
| Hard Memory Controller | DDR3/DDR4/QDRIV |
| Process Technology | 20nm Tri-Gate CMOS |
| Core Voltage | 0.9 V |
| Package | 1517-ball FCBGA (40 x 40 mm) |
| Operating Temperature | -40C to +100C (Industrial) |
| Mounting Type | Surface Mount (BGA) |
| MSL Level | 3 |
| RoHS Status | Compliant |
| PCIe Hard IP | PCIe Gen3 x8 |
10AX090R4F40I3LG 1517-ball fcbga (40 x 40 mm) Pin Configuration Guide
Complete pinout information for 10AX090R4F40I3LG (1517-ball fcbga (40 x 40 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for 10AX090R4F40I3LG.
Refer to the datasheet for full pin configuration.
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
10AX090R4F40I3LG is suitable for 6 applications: PCIe Gen3 Accelerator Cards, 4K/8K Video Broadcast Processing, Military Radar and EW Front Ends, 100G/400G OTN Line-Card Bridging, ASIC Prototyping and Emulation, Industrial Imaging and Machine Vision.
PCIe Gen3 Accelerator Cards
The 10AX090R4F40I3LG fits PCIe Gen3 x8 accelerator cards because it integrates a hardened PCIe Gen3 controller and 24 transceivers at 14.4 Gbps, eliminating external PHY ICs. With 900K logic elements and 1,518 DSP blocks, designers can host deep-learning inference engines, FPGA-side preprocessing for AI workloads, or custom NVMe accelerators on the same die. The 342 user I/O and 0.9 V core simplify power-rail design at typical accelerator card budgets of 25-75 W.
Recommended
4K/8K Video Broadcast Processing
The 10AX090R4F40I3LG's 1,518 DSP blocks deliver several hundred GMACs of video pixel throughput, well matched to multi-channel 4Kp60 and 8K broadcast pipelines for SDI-over-IP, HEVC/H.265 mezzanine compression, and HDR tone mapping. The integrated DDR4 controller at 2,133 Mbps supports 4:4:4 frame buffers without external memory PHYs, and the 24 transceivers handle 12G-SDI, 25G Ethernet, and SMPTE 2110 IP-based video fabrics concurrently.
Recommended
Military Radar and EW Front Ends
The 10AX090R4F40I3LG is well suited to radar and electronic-warfare front-end processing thanks to its industrial -40C to +100C operating range, 1.5 TFLOPS floating-point capability via the DSP chain, and 14.4 Gbps transceivers for direct ADC-to-FPGA links such as JESD204B/C. The 900K logic elements provide headroom for adaptive beamforming weights, pulse compression, and CFAR detection at the same time as ethernet fan-out to back-end processors.
Recommended
100G/400G OTN Line-Card Bridging
The 10AX090R4F40I3LG handles OTN line-card bridging in metro and long-haul transport equipment because its 24 transceivers can be aggregated into multiple 100G OTU4 or 4x25G breakout ports without external muxponders. The 59 Mbit embedded memory and DDR4 controller simplify OTN framer buffering, and the 900K logic elements carry full ODUflex mapping, GMP encoding, and FEC (RS-FEC, GFEC) within a single device.
Recommended
ASIC Prototyping and Emulation
The 10AX090R4F40I3LG serves as an effective ASIC prototyping vehicle with 900K logic elements, abundant DSP and block RAM, and 342 user I/O for multi-FPGA partitioning. The industrial temperature grade supports bring-up at both bench and chassis temperatures, and the integrated PCIe Gen3 hard IP enables direct linking to host emulators such as Synopsys ZeBu or Cadence Protium for software co-verification.
Recommended
Industrial Imaging and Machine Vision
The 10AX090R4F40I3LG powers high-speed industrial imaging because its 1,518 DSP blocks handle real-time Bayer demosaic, lens distortion correction, and convolution at multi-gigapixel rates. The 24 transceivers link CoaXPress 2.0, 10 GigE Vision, and Camera Link HS cameras concurrently, while the DDR4 controller at 2,133 Mbps absorbs line-scan bursts. The industrial temperature grade ensures operation on factory floors without thermal throttling.
Recommended
Recommended Products Summary
Engineering reference data for 10AX090R4F40I3LG — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 10AX090R4F40E3LG | 10AX090R3F40I2LG | 10AX090N4F40I3LG | 10AX090R3F40I2SG | 10AX090R2F40I2LG |
|---|---|---|---|---|---|---|
| Package | 1517-ball FCBGA (F40, 40x40 mm) | 1517-ball FCBGA (F40) - same | 1517-ball FCBGA (F40) - same | 1517-ball FCBGA (F40) - same | 1517-ball FCBGA (F40) - same | 1517-ball FCBGA (F40) - same |
| Brand | Intel (formerly Altera) | Intel | Intel | Intel | Intel | Intel |
| Speed Grade | -4 (fastest) | -4 (same) | -3 (slower, ~15% lower Fmax) | -4 (same) | -3 (slower) | -2 (slowest) |
| Logic Elements | 900,000 | 900,000 | 900,000 | 900,000 | 900,000 | 900,000 |
| Transceiver Variant | GX (24 ch @ 14.4 Gbps) | GX (same) | GX (same) | GT (reduced) | GX (same) | GX (same) |
| Temperature Grade | Industrial (-40C to +100C) | Extended (commercial) | Industrial (same) | Industrial (same) | Industrial (same) | Industrial (same) |
| Core Voltage | 0.9 V | 0.9 V | 0.9 V | 0.9 V | 0.9 V | 0.9 V |
| Approx. Unit Price (USD) | 7,244.37 | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
Key Differentiators
- Industrial temperature grade in F40 package (vs 10AX090R4F40E3LG)
- Fastest speed grade in the Arria 10 GX F40 family (vs 10AX090R3F40I2LG)
- Full 24-channel 14.4 Gbps transceiver array (vs 10AX090N4F40I3LG)
Design Notes
Estimated: at 0.9 V core with peak transceiver utilization, the 10AX090R4F40I3LG can draw 60-90 A transient current. Use a 14+ layer PCB stack-up with dedicated 0.9 V and 1.8 V planes, place 30-50 ceramic decoupling capacitors (10 nF, 100 nF, and 4.7 uF mix) around the FCBGA periphery, and follow the Intel Power Distribution Network (PDN) design guidelines for Arria 10 to keep core voltage ripple below 2%.
The 1517-ball FCBGA has a theta_JB around 0.5 C/W and a theta_JA around 8-12 C/W depending on airflow. For 25 W sustained dissipation, attach a heatsink with thermal interface material rated for industrial temperatures, or use the FCBGA's top-side integrated heat-spreader footprint. Always validate with the Arria 10 thermal model and characterize in worst-case ambient (industrial: +100C).
Use microvia or stacked-via technology for fan-out from the 1 mm pitch FCBGA. Match trace lengths within a transceiver channel to within 0.127 mm to keep skew within the 14.4 Gbps margin. Reference-plane stitching vias must be placed every lambda/20 along high-speed traces to suppress resonances.
Do not assume the JTAG ID of speed-grade variants is identical - the Quartus programmer must match the exact MPN before configuration. Industrial (-I) and extended (-E) grades are NOT interchangeable for systems specified to operate beyond 0C. Always check the Intel PCN feed for the F40 package before committing a board revision to volume production.
Compliance Information
RoHS and lead-free confirmed by the Heisener and Ampheo product pages; AEC-Q100 not applicable for an FPGA. Always request C of C for industrial-temp orders.
