10AX090S3F45I2SG - Arria 10 GX 900K LE FPGA | Intel | F45 FCBGA
MPN: 10AX090S3F45I2SG ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7606.24 | $7,606.24 |
| 10 | $6845.62 | $68,456.20 |
| 100 | $6084.99 | $608,499.00 |
| 500 | $5324.37 | $2,662,185.00 |
| 1,000 | $4563.74 | $4,563,740.00 |
Drop-in alternatives for 10AX090S3F45I2SG — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
10AX090S3F45I2LG
✅ Drop-In✓ In Stock
$4050 / Unit
View Datasheet →10AX090S3F45E2SG
✅ Drop-In✓ In Stock
$5320 / Unit
View Datasheet →10AX090S2F45I2SG
✅ Drop-In✓ In Stock
$3750 / Unit
View Datasheet →10AX090S3F45E2LG
✅ Drop-In✓ In Stock
$12480 / Unit
View Datasheet →10AX090S2F45I2LG
✅ Drop-In✓ In Stock
$3800 / Unit
View Datasheet →10AX090S3F45I2SG Maximum Ratings & Electrical Characteristics
| Series | Arria 10 GX |
| Logic Elements | 900,000 |
| Embedded Memory Bits | 59,234,304 |
| User I/Os | 624 |
| Process Technology | 20 nm |
| Core Supply Voltage | 0.9 V |
| Package | 1932-ball FCBGA (F45) |
| Mounting Type | Surface Mount |
| Temperature Grade | Industrial |
| Speed Grade | I2 |
| Transceivers | Up to 96 (12.5 Gbps chip-to-chip) |
| Hard PCIe IP | PCIe Gen3 x8 (backwards compatible to Gen2/Gen1) |
| Hard Memory Controllers | 2 (DDR4, DDR3, QDRIV, RLDRAM3) |
| DSP Blocks | Variable-precision, up to ~1.5 TFLOPs FP32 |
| LVDS Channels | Up to 1.6 Gbps |
| RoHS Status | Compliant |
10AX090S3F45I2SG 1932-ball fcbga (f45) Pin Configuration Guide
Complete pinout information for 10AX090S3F45I2SG (1932-ball fcbga (f45) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for 10AX090S3F45I2SG.
Refer to the datasheet for full pin configuration.
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
10AX090S3F45I2SG is suitable for 6 applications: Wireless Baseband Processing, Radar and Beamforming, Broadcast and Professional Video Processing, Medical Imaging Backplanes, Test and Measurement Equipment, PCI Express Gen3 Accelerator Cards.
Wireless Baseband Processing
The 10AX090S3F45I2SG's 900K logic elements and up to 96 transceivers running at 12.5 Gbps make it ideal for wireless baseband processing in LTE and 5G base stations. Per the Arria 10 datasheet, the variable-precision DSP blocks deliver up to 1.5 TFLOPs single-precision floating-point, enabling CPRI and JESD204B-based radio unit (RU) implementations. Industrial temperature grade ensures operation in outdoor base-station enclosures.
Recommended
Radar and Beamforming
The 10AX090S3F45I2SG delivers high-density DSP for phased-array radar and electronic-warfare beamforming. Its 96 transceivers at 12.5 Gbps and 1.5 TFLOPs of FP32 DSP support hundreds of antenna-element streams in a single device. The F45 FCBGA package integrates the device into 12-18 layer radar backplanes, while hard PCIe Gen3 x8 IP accelerates host-side data ingest from external DSP or storage.
Recommended
Broadcast and Professional Video Processing
The 10AX090S3F45I2SG's 624 user I/Os and high transceiver count suit uncompressed 4K/8K broadcast video routing and processing. The Arria 10 GX architecture integrates displayport, HDMI, SDI, and 12G-SDI physical interfaces via soft IP, while the 59.2 Mbit embedded memory supports multi-frame buffering without external SDRAM. Industrial temperature grade enables reliable operation in studio and outside-broadcast (OB) vans.
Recommended
Medical Imaging Backplanes
The 10AX090S3F45I2SG is well suited to MRI, CT, and ultrasound imaging backplanes that aggregate multi-gigabit sensor data. Its 96 transceivers support high-speed JESD204B/C links from analog front-ends, while the 624 user I/Os connect to image-pipeline memory and DSP subsystems. The industrial temperature grade plus low-power 20nm process helps meet medical thermal budgets.
Recommended
Test and Measurement Equipment
The 10AX090S3F45I2SG powers high-end oscilloscopes, logic analyzers, and protocol testers that need 100G Ethernet, PCIe Gen3, and 12.5 Gbps backplane signal capture. Its hard PCIe Gen3 x8 IP enables line-rate data export to host servers, and the 1.5 TFLOPs DSP delivers real-time FFT and protocol decode. The F45 FCBGA 1932-ball package allows dense board integration.
Recommended
PCI Express Gen3 Accelerator Cards
The 10AX090S3F45I2SG's hard PCIe Gen3 x8 IP block enables drop-in accelerator card designs targeting HPC, AI inference, and storage acceleration. The 900K logic elements and 1.5 TFLOPs DSP provide ample compute capacity, while 96 transceivers connect to QSFP28 100G network ports for clustering. Industrial temperature grade supports data-center cold-aisle and edge deployment.
Recommended
Recommended Products Summary
Engineering reference data for 10AX090S3F45I2SG — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 10AX090S3F45I2LG | 10AX090S3F45E2SG | 10AX090S2F45I2SG | 10AX090S3F45E2LG | 10AX090S2F45I2LG |
|---|---|---|---|---|---|---|
| Package | 1932-ball FCBGA (F45) | 1932-ball FCBGA (F45) - same | 1932-ball FCBGA (F45) - same | 1932-ball FCBGA (F45) - same | 1932-ball FCBGA (F45) - same | 1932-ball FCBGA (F45) - same |
| Brand | Intel (Altera) | Intel | Intel | Intel | Intel | Intel |
| Logic Elements | 900,000 | 900,000 | 900,000 | 900,000 | 900,000 | 900,000 |
| Temperature Grade | Industrial (-40C to +100C) | Industrial | Extended | Industrial | Extended | Industrial |
| Speed Grade | I2 | I2 | E2 | I2 | E2 | I2 |
| Lead-Free Finish | No (SnPb) | Yes (Pb-free) | No (SnPb) | No (SnPb) | Yes (Pb-free) | Yes (Pb-free) |
| Transceivers | Up to 96 | Up to 96 | Up to 96 | Fewer (~64) | Up to 96 | Fewer (~64) |
| Unit Price (Qty 1, as of 2026-09) | $7,606.24 | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
Key Differentiators
- Highest logic density in the Arria 10 F45 FCBGA family (vs 10AX066S3F45I2SG)
- Maximum transceiver count with industrial-grade speed grade (vs 10AX090S2F45I2SG)
- Industrial speed grade I2 over extended E2 (vs 10AX090S3F45E2SG)
Design Notes
The 1932-ball F45 FCBGA requires a minimum 12-layer PCB stackup (Intel recommends 18 layers for full signal-integrity margin). Use 1.0 mm ball pitch escape routing with microvia-in-pad or HDI stackup to break out the dense BGA array. Reference the Altera Arria 10 F45 layout guidelines for via-in-pad antipad and power-plane recommendations.
Power the 0.9V core rail using Enpirion PowerSoC or discrete DrMOS stages with sufficient bulk decoupling (recommended 22x 22uF ceramic + 4x 470uF polymer) per Intel's Arria 10 power-tree reference design. Use the Arria 10 Early Power Estimator (EPE) worksheet to size rails before schematic capture; expected total power is 15-25W depending on transceiver utilization and DSP activity.
Estimated: at 0.9V x 20A core current and full transceiver utilization, junction-to-ambient thermal resistance needs to be below 1.5 C/W. The F45 package has a top-side exposed die and thermal lid - apply thermal interface material (TIM) and use a heatsink with low thermal resistance. Industrial-grade parts must keep Tj below +100C under worst-case workload.
For 12.5 Gbps chip-to-chip transceivers, route the high-speed SERDES channels on inner stripline layers with controlled impedance (100 ohm differential) and length-matching tolerance of 0.127 mm within a channel pair. Use reference clock jitter attenuators with RMS jitter below 150 fs for backplane applications.
Compliance Information
10AX090S3F45I2SG uses standard SnPb (non-lead-free) finish. For RoHS-compliant drop-in replacement, choose 10AX090S3F45I2LG. AEC-Q100 not applicable - this is an FPGA. Reach and conflict-minerals compliance per Intel.
