Intel

10AX115S3F45E2LG - Arria 10 GX 1150K LE FPGA | Intel | 1932-FCBGA

MPN: 10AX115S3F45E2LG βœ“ Active
In Stock Ships in 1-3 business days
0.9 V Vdss 1932-BBGA, FCBGA Package -2 (Extended) Speed 68,857,856 bits Memory
From $7950 USD / Unit
MOQ: 1 |
Price updated: 2026-09-05
Volume Pricing
Qty Unit Price Extended
1 $8928.97 $8,928.97
10 $8710 $87,100.00
100 $8450 $845,000.00
500 $8200 $4,100,000.00
1,000 $7950 $7,950,000.00
ℹ️ All prices are in USD

Drop-in alternatives for 10AX115S3F45E2LG β€” same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Quick Comparison Tool β€” Select alternative parts for side-by-side comparison:

10AX115S3F45E2SG

βœ… Drop-In
Intel
πŸ“¦ 1932-BBGA, FCBGA
Arria 10 GX Β· 10AX115 Β· 1,150,000 Β· 68,857,856 bits (68.86 Mbits) Β· 1,518 (18x19 multipliers) Β· 624 Β· Up to 24 channels at up to 17.4 Gbps Β· Gen3 x8

βœ“ In Stock

$6200 / Unit

View Datasheet β†’

10AX115S3F45E1SG

βœ… Drop-In
πŸ“¦ 1932-BBGA, FCBGA
same F45 footprint, speed grade -1 (faster, ~10-15% higher Fmax than -2), Extended temp - pin-compatible

πŸ“‹ Reference alternative (not in catalog)

10AX115S3F45I1SG

βœ… Drop-In
πŸ“¦ 1932-BBGA, FCBGA
same F45 footprint, Industrial temperature grade (wider range than Extended), speed grade -1 - drop-in for harsher environments

πŸ“‹ Reference alternative (not in catalog)

10AX115S2F45E2LG

βœ… Drop-In
Altera
πŸ“¦ 1932-BBGA, FCBGA
Arria 10 GX Β· 1,150,000 Β· 68,857,600 bits Β· 624 Β· 20 nm Β· 0.9 V Β· 1932-ball FCBGA Β· Surface Mount

βœ“ In Stock

$7100 / Unit

View Datasheet β†’

10AX115S2F45E2SG

βœ… Drop-In
Intel
πŸ“¦ 1932-BBGA, FCBGA
Arria 10 GX Β· 1,150,000 Β· 427,200 Β· 68,857,856 Β· 1,518 Β· 624 Β· 24 channels Β· 28.05 Gbps

βœ“ In Stock

$6975.76 / Unit

View Datasheet β†’

10AX115S3F45I2SG

βœ… Drop-In
Intel
πŸ“¦ 1932-BBGA, FCBGA
Arria 10 GX Β· 1,150,000 Β· 68,857,856 bits (8,557 Kbit x 8) Β· 624 Β· Up to 24 Β· 14.1 Gbps Β· Hard IEEE 754 floating-point capable Β· 20 nm

βœ“ In Stock

$2020 / Unit

View Datasheet β†’

10AX115S3F45E2LG Maximum Ratings & Electrical Characteristics

Family Arria 10 GX
Logic Elements 1,150,000
Embedded Memory 68,857,856 bits
User I/O 624
Core Voltage 0.9 V
Process Technology 20 nm
Package 1932-BBGA, FCBGA
Footprint F45
Speed Grade -2 (Extended)
Temperature Grade Extended
Transceivers Up to 28.05 Gbps backplane-capable
DSP Blocks Hardened floating-point DSP
PCIe Hard IP PCIe Gen3 x8 hard IP
Lead-Free / RoHS Yes (lead-free finish, RoHS compliant)
Mounting Type Surface Mount (BGA)

10AX115S3F45E2LG Pin Configuration

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Pin 1 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 2 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 3 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 4 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 5 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 6 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 7 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 8 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 9 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 10 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 11 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint
Pin 12 IO_xxx β€” User I/O ball; refer to Quartus Prime pin planner for exact ball coordinates in the F45 footprint

Safe Operating Area (SOA) & Thermal Characteristics

Safe Operating Area Chart Default safe operating area chart for 10AX115S3F45E2LG Drain-to-Source Voltage (Vds) Drain Current (Id)

No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.

Typical Applications

10AX115S3F45E2LG is suitable for 6 applications: High-Speed Video Broadcast and Processing, Medical Imaging and Diagnostic Equipment, Test and Measurement Instrumentation, Wireless Baseband Pre-Processing, Defense and Aerospace Signal Processing, Industrial Control and High-Speed Data Acquisition.

πŸ“Ί

High-Speed Video Broadcast and Processing

The 10AX115S3F45E2LG fits 4K/8K video broadcast and processing because its 1,150,000 logic elements and embedded DSP blocks can sustain multi-stream HEVC/AVC pipelines at full frame rate, while the 28.05 Gbps transceivers carry uncompressed video over SMPTE ST 2082 (12G-SDI) links. Designers place the device on a multi-layer PCB with matched-length SDI traces and route the transceiver channels through AC-coupled connectors to preserve signal integrity at 12 Gbps. Compared with a discrete CPU+GPU stack, the Arria 10 GX delivers deterministic latency and lower per-frame jitter, which is critical for live broadcast timing.

πŸ’Š

Medical Imaging and Diagnostic Equipment

The 10AX115S3F45E2LG suits medical imaging because its hardened floating-point DSP slices accelerate CT, MRI, and ultrasound reconstruction kernels (filtered back-projection, beamforming) in deterministic cycles. The Extended temperature grade supports the thermal envelope inside an imaging cabinet, and the 68,857,856 bits of embedded memory hold image-line buffers close to the logic, cutting external DRAM round-trips. Engineers typically pair it with a JESD204B ADC front end, clocked from the FPGA's transceiver PLLs, and stream samples into on-chip memory for real-time processing at frame rates above 30 fps.

πŸ”§

Test and Measurement Instrumentation

The 10AX115S3F45E2LG is widely deployed in oscilloscopes, logic analyzers, and protocol testers because its 624 user I/O plus 28.05 Gbps transceivers handle multi-channel analog front-end capture and PCIe Gen3 host upload in parallel. The high logic density supports deep on-chip acquisition memory and real-time trigger logic at sample rates above 5 GSPS, while the PCIe hard IP block offloads waveform data to the host CPU without tying up transceiver resources. Designers use the FPGA's partial-reconfiguration feature to swap between protocol analyzer personalities (PCIe, USB, Ethernet) in the field.

🌐

Wireless Baseband Pre-Processing

The 10AX115S3F45E2LG supports wireless baseband pre-processing because its hardened DSP and CPRI/OBSAI-capable transceivers handle multi-antenna radio front-haul at up to 9.8 Gbps per channel. The 1,150,000 logic elements implement crest-factor reduction (CFR) and digital pre-distortion (DPD) engines that linearize power amplifiers in 4G/5G small-cell radios. Engineers typically pair the FPGA with a host SoC over PCIe Gen3 and run the pre-processing pipeline at line rate without loading the SoC, preserving headroom for stack-layer processing.

✈️

Defense and Aerospace Signal Processing

The 10AX115S3F45E2LG meets defense signal-processing needs because its Extended temperature range, hardened DSP blocks, and high logic capacity allow radar pulse compression, electronic-warfare channelization, and SIGINT demodulation in a single device. Designers implement polyphase filter banks and FFT engines on-chip and stream processed data via the 28.05 Gbps transceivers to a downstream recorder or display processor. Compared with a discrete DSP cluster, the Arria 10 GX reduces SWaP-C by collapsing multiple boards into one BGA, an important advantage in size-constrained platforms.

🏭

Industrial Control and High-Speed Data Acquisition

The 10AX115S3F45E2LG is well suited to industrial data acquisition because its 624 user I/O and high-density logic can interface with parallel ADC/DAC banks, while the transceivers serialize the resulting streams to a host controller. Designers implement deterministic real-time control loops in the FPGA fabric, bypassing the jitter of a CPU-based PLC, and use partial reconfiguration to switch between sensor configurations on the line. Compared with a microcontroller stack, the Arria 10 GX gives deterministic sub-microsecond loop times and deterministic GPIO-to-transceiver latency.

Recommended Products Summary

10AX115S3F45E2SG Intel Used in: High-Speed Video Broadcast and Processing, Test and Measurement Instrumentation, Defense and Aerospace Signal Processing 10AX115S3F45E1SG Higher-speed-grade Arria 10 GX for tighter video timing margins Used in: High-Speed Video Broadcast and Processing, Test and Measurement Instrumentation, Wireless Baseband Pre-Processing, Industrial Control and High-Speed Data Acquisition 10AX115S3F45I1SG Industrial-temperature variant for higher ambient operating range Used in: Medical Imaging and Diagnostic Equipment, Wireless Baseband Pre-Processing, Defense and Aerospace Signal Processing 10AX115S2F45E2LG Altera Used in: Medical Imaging and Diagnostic Equipment, Industrial Control and High-Speed Data Acquisition
What is the 10AX115S3F45E2LG?
The 10AX115S3F45E2LG is an Intel (formerly Altera) Arria 10 GX FPGA with 1,150,000 logic elements, 68,857,856 bits of embedded memory, and 624 user I/O, housed in a 1932-ball FCBGA package. According to Intel's Arria 10 device datasheet, it is the Extended-temperature, lead-free, speed grade -2 variant of the Arria 10 GX 1150K-LE family with the F45 footprint, intended for high-throughput transceiver-based designs.
How much does the 10AX115S3F45E2LG cost?
The 10AX115S3F45E2LG is priced at approximately $8,928.97 per unit at qty 1, with quantity-break pricing available down to about $7,950 at 1000 units (as of 2026-09-05, per Heisener listing). High-end Arria 10 GX parts are typically quoted rather than stocked; distributor pricing varies by allocation.
What is the lead time for 10AX115S3F45E2LG?
Lead time for the 10AX115S3F45E2LG is typically listed as 'To Be Confirmed' by independent distributors, with estimated delivery windows in the 4-12 week range depending on allocation (as of 2026-09-05). For production volumes, engineers should request a firm quote and confirm Intel/authorized-channel allocation.
Is the 10AX115S3F45E2LG in stock?
Independent distributors such as Heisener list small open-market stock for the 10AX115S3F45E2LG (around 6,016 pieces observed on 2026-09-05), but authorized-channel stock is typically by quote. Real-time stock should be checked on Mouser, DigiKey, and Intel's authorized partners before placing volume orders.
Where can I buy the 10AX115S3F45E2LG online?
The 10AX115S3F45E2LG can be sourced through authorized Intel/Altera distributors including Mouser and DigiKey, and through independent distributors such as Heisener, Lisleapex, Xecor, and Hotenda. Always verify RoHS, date code, and traceability for new production builds.
What is the difference between 10AX115S3F45E2LG and 10AX115S3F45E2SG?
The 10AX115S3F45E2LG is lead-free with a lead-free finish, while the 10AX115S3F45E2SG carries a standard SnPb or non-RoHS finish. According to the Arria 10 datasheet, both share the same -2 speed grade, F45 footprint, and 1932-ball FCBGA package, making them pin-compatible for users whose assembly process can accept either finish.
10AX115S3F45E2LG vs 10AX115S3F45E1SG - which is faster?
The 10AX115S3F45E1SG is the speed-grade -1 variant, which is Intel's fastest Arria 10 GX Extended-temperature grade (typically ~15% higher Fmax than -2). The 10AX115S3F45E2LG is the -2 grade, trading roughly 10-15% Fmax for lower cost. Choose -1 for timing-critical designs; choose -2 to save cost when timing closes at the lower grade.
What is the best drop-in replacement for the 10AX115S3F45E2LG?
The best drop-in replacements for the 10AX115S3F45E2LG are other Arria 10 GX 10AX115 devices in the same 1932-ball F45 footprint, such as the 10AX115S3F45E2SG, 10AX115S3F45E1SG, and 10AX115S3F45I1SG. All share identical pin-out and silicon; only speed grade, temperature grade, and lead-free finish differ, so they are true drop-in alternatives on the same PCB.
Can a Stratix 10 or Cyclone 10 GX replace the 10AX115S3F45E2LG?
No. The Intel Stratix 10 and Cyclone 10 GX families use different BGA footprints, transceivers, and power rails from the Arria 10 GX family. They are not pin-compatible drop-in replacements for the 10AX115S3F45E2LG and would require a full PCB redesign and Quartus Prime device re-target.
When should I choose the 10AX115S3F45E2LG over a different Arria 10 variant?
Choose the 10AX115S3F45E2LG when you need the 1150K-LE high-density Arria 10 GX tier with the F45 footprint, the -2 speed grade, and lead-free/RoHS compliance, all in the 1932-ball FCBGA package. Per Intel's Arria 10 family datasheet, this combination is typical for production Extended-temperature designs where cost and RoHS are higher priority than maximum Fmax.
Where can I download the 10AX115S3F45E2LG datasheet PDF?
The official Intel Arria 10 device datasheet (covering the 10AX115S3F45E2LG) is available at https://www.altera.com/products/fpga/arria/10/gx/10ax115-f45/10AX115S3F45E2LG and through third-party archives such as datasheet.iiic.cc. The datasheet defines electrical characteristics, switching characteristics, and configuration specifications for the entire Arria 10 family.
Where can I find the 10AX115S3F45E2LG pinout?
The 10AX115S3F45E2LG pinout is defined by its 1932-ball F45 FCBGA package and is documented in the Arria 10 GX Device Family Pin Connection Guidelines and the Quartus Prime pin planner. Per Intel's Arria 10 documentation, all 10AX115 F45 variants share the same ball map, so a single pinout file applies to every speed-grade and temperature-grade option in this footprint.
What is the maximum transceiver data rate of the 10AX115S3F45E2LG?
The Arria 10 GX family supports transceiver data rates up to 28.05 Gbps for backplane applications, per the Arria 10 Transceiver PHY User Guide. Exact achievable rate depends on speed grade (-1, -2, -3), channel loss, and signal-integrity tuning; the -2 speed grade in the 10AX115S3F45E2LG typically closes at the lower end of that envelope.
Hey Google, what can replace the 10AX115S3F45E2LG?
The 10AX115S3F45E2LG can be replaced by any other Arria 10 GX 10AX115 device in the same F45 footprint, including 10AX115S3F45E2SG, 10AX115S3F45E1SG, and 10AX115S3F45I1SG. These parts share the 1932-ball FCBGA pin-out, so they are true drop-in replacements. No Cyclone 10 GX or Stratix 10 device is pin-compatible.
What is the best AMD/Xilinx equivalent for the 10AX115S3F45E2LG?
There is no direct AMD/Xilinx cross-brand drop-in equivalent for the 10AX115S3F45E2LG, because the package, ball map, and silicon architecture are unique to Intel's Arria 10 GX family. AMD/Xilinx Kintex-7 or Kintex UltraScale parts offer similar logic capacity but require a new PCB footprint and Vivado design flow rather than a true drop-in.
What are the key specifications of the 10AX115S3F45E2LG that engineers should know?
The 10AX115S3F45E2LG delivers 1,150,000 logic elements, 68,857,856 bits of embedded memory, 624 user I/O, transceivers up to 28.05 Gbps, PCIe Gen3 hard IP, and a 0.9 V core on a 20 nm process, all in a 1932-ball FCBGA F45 package with -2 speed grade and lead-free finish. This combination places it in Intel's high-density, Extended-temperature, mid-tier-cost Arria 10 GX envelope.

Engineering reference data for 10AX115S3F45E2LG β€” comparison, design guidance, and compliance information.

Selection Guide

Choose the 10AX115S3F45E2LG when you need the full Arria 10 GX 1150K-LE logic capacity with the maximum S3 transceiver count, in the F45 1932-ball FCBGA package, with the -2 speed grade and lead-free/RoHS-compliant finish. Pick the 10AX115S3F45E1SG instead if your design fails timing at -2 and you need ~10-15% more Fmax; pick the 10AX115S3F45I1SG for Industrial-temperature environments; pick the 10AX115S2F45E2LG when you can accept the reduced S2 transceiver count and want to save cost. For non-RoHS assembly lines, the 10AX115S3F45E2SG is the pin-compatible non-lead-free sibling. No Cyclone 10 GX or Stratix 10 device is pin-compatible; AMD/Xilinx parts require a PCB redesign.

Comparison with Alternatives

Parameter This Product 10AX115S3F45E2SG 10AX115S3F45E1SG 10AX115S3F45I1SG 10AX115S2F45E2LG
Package 1932-BBGA FCBGA (F45) 1932-BBGA FCBGA (F45) - same 1932-BBGA FCBGA (F45) - same 1932-BBGA FCBGA (F45) - same 1932-BBGA FCBGA (F45) - same
Brand Intel Intel Intel Intel Intel
Speed Grade -2 (Extended) -2 (Extended) -1 (Extended) -1 (Industrial) -2 (Extended)
Temperature Grade Extended Extended Extended Industrial Extended
Lead-Free Finish Yes (RoHS) No (non-RoHS finish) No (non-RoHS finish) No (non-RoHS finish) Yes (RoHS)
Logic Elements 1,150,000 1,150,000 1,150,000 1,150,000 1,150,000
Embedded Memory 68,857,856 bits 68,857,856 bits 68,857,856 bits 68,857,856 bits 68,857,856 bits
User I/O 624 624 624 624 624
Transceiver Class S3 (highest transceiver count) S3 (same) S3 (same) S3 (same) S2 (reduced transceivers)
Approx. Unit Price (qty 1) $8,928.97 Similar (~$8,500-$9,000) Higher (~$9,500-$10,500) Higher (~$10,000-$11,000) Lower (~$7,500-$8,500)

Key Differentiators

  • Lead-free, RoHS-compliant Extended-temperature grade (vs 10AX115S3F45E2SG)
  • Speed grade -2 for lower cost vs -1 (vs 10AX115S3F45E1SG)
  • Highest transceiver class (S3) in the 10AX115 family (vs 10AX115S2F45E2LG)

Design Notes

The Arria 10 GX device requires multiple voltage rails (0.9 V core, 1.1 V auxiliary, 1.8 V I/O, plus transceiver rails). Power-on sequencing is mandatory per the Arria 10 datasheet: bring up the 1.8 V rail before the 0.9 V core, and respect the monotonic-rising requirement. Use the Intel-supplied PowerTree Designer tool and reference the Arria 10 GX Device Design Guidelines for sequencing and ramp-rate values.

For 28.05 Gbps backplane operation, the PCB stackup must be a low-loss material (e.g., Megtron 6 or equivalent) with controlled-impedance 100-ohm differential channels and continuous reference planes. Per Intel's Arria 10 Transceiver PHY User Guide, transceiver channels must use AC coupling and matched lengths within the lane-to-lane skew budget; violations will close the eye at 28 Gbps.

At full transceiver utilization the Arria 10 GX 1150K-LE part can dissipate 20-30 W. The 1932-ball FCBGA requires a properly designed heatsink or cold plate with thermal interface material rated for the package. Reference the Arria 10 Thermal Management User Guide and use the junction-to-ambient thermal resistance from the device datasheet to size the cooling solution.

Do not assume the 10AX115S3F45E2LG and a non-LE Arria 10 device are interchangeable: the LE suffix denotes the standard logic-to-transceiver ratio, while the non-LE variants have fewer transceivers. Mixing them will cause Quartus Prime fitter errors and uncorrected pin mismatches. Always confirm the full MPN (10AX115S3F45E2LG, with the 'S3' transceiver code) matches the device order code in the BOM.

Compliance Information

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Lead Free
Yes
Halogen Free
Unknown
Conflict Minerals
Compliant

RoHS-compliant lead-free finish per Intel product page; the LG suffix denotes lead-free per Arria 10 ordering information. AEC-Q100 not applicable for FPGAs.

Data verified on: 2026-09-05 β€” data verified and curated by XAIPART's component engineering team

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Related Components & Terms

Intel Altera 10AX115S3F45E2LG Arria 10 GX FPGA Field-Programmable Gate Array programmable logic digital IC semiconductor FCBGA BGA 1932-ball package F45 footprint 20 nm process 28.05 Gbps transceiver PCIe Gen3 hard IP DSP block floating-point DSP RoHS lead-free finish Quartus Prime Extended temperature grade backplane video broadcast medical imaging
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