ATMEGA328PB-AU - 8-Bit AVR MCU 20MHz 32KB Flash | Microchip
MPN: ATMEGA328PB-AU β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.55 | $1.55 |
| 10 | $1.4 | $14.00 |
| 100 | $1.28 | $128.00 |
| 500 | $1.19 | $595.00 |
| 1,000 | $1.12 | $1,120.00 |
ATMEGA328PB-AU Overview
An 8-bit AVR microcontroller is a Harvard-architecture RISC processor that executes most instructions in a single clock cycle, achieving throughputs close to 1 MIPS per MHz. Within the power-management and embedded-control hierarchy, it spans the classic 8051/PIC class up to entry-level 32-bit MCUs, and the ATmega328PB is the direct peripheral-enhanced successor to the widely used ATmega328P that powers the Arduino UNO and Nano.
Key features include the picoPower technology for sub-uA sleep currents, two flexible 8/16-bit timer/counters, two USARTs, two TWI (I2C) interfaces, and two SPI interfaces - one more of each serial peripheral than the ATmega328P. The device also provides a 10-bit ADC with up to 7 external channels, an analog comparator, and a programmable watchdog timer.
Architecturally, the AVR enhanced RISC core combines 32 general-purpose working registers directly connected to the ALU, allowing single-cycle instruction execution and efficient C compilation. On-chip ISP Flash supports read-while-write firmware updates, and recent production includes Functional Safety (FuSa) support per Microchip's safety documentation.
Typical applications include Arduino-compatible hobby and maker boards, industrial sensors and actuators, consumer appliance control, battery-powered IoT nodes, and legacy ATmega328P cost-down redesigns, where the PB variant adds peripherals while reducing cost.
Design consideration: the ATmega328PB is software-backward-compatible with the ATmega328P, but the added Port E functions on pins 19 and 22 mean designs leaving those pins connected to external circuitry should verify the enhanced pinout against the Microchip datasheet 40001906 before layout reuse.
This page synthesizes distributor pricing, drop-in alternatives, pinout data, and practical design notes not consolidated in the manufacturer datasheet.
Drop-in alternatives for ATMEGA328PB-AU β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with ATMEGA328PB-AU (same form factor and footprint) β differing in EEPROM, SRAM, General Purpose I/O, Operating Temperature, Throughput.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
ATMEGA328PB-AN
β Drop-In β οΈ εζ°εΎ ιͺθ―β In Stock
$1.66 / Unit
View Datasheet βATMEGA328P-AU
β Drop-In β οΈ εζ°εΎ ιͺθ―β In Stock
$1.85 / Unit
View Datasheet βATMEGA328-AU
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
ATMEGA168PB-AUR
β Drop-Inβ In Stock
$1.58 / Unit
View Datasheet βATMEGA168PA-ANR
β Drop-Inβ In Stock
$1.44 / Unit
View Datasheet βATMEGA328PB-AU Maximum Ratings & Electrical Characteristics
| Core Processor | AVR |
| Core Size | 8-Bit |
| Speed | 20 MHz |
| Flash Memory | 32 KB (16K x 16) |
| EEPROM | 2 KB |
| SRAM | 4 KB |
| General Purpose I/O | 27 |
| Connectivity | I2C x2, SPI x2, USART x2 |
| ADC Resolution | 10-bit |
| Number of ADC Channels | 7 |
| Package | 32-TQFP (7 x 7 mm) |
| Mounting Type | Surface Mount |
| Operating Temperature | -40C to +85C (Industrial) |
| Technology | picoPower, CMOS |
| Safety Feature | Functional Safety (FuSa) |
| Programming | In-System Programmable (ISP), read-while-write |
| Instruction Throughput | Up to 20 MIPS at 20 MHz |
ATMEGA328PB-AU Pin Configuration
| Pin 1 | PD3 β Port D bit 3 (GPIO / PCINT19 / OC2B / INT1) |
| Pin 2 | PD4 β Port D bit 4 (GPIO / PCINT20 / XCK / T0) |
| Pin 3 | GND β Ground |
| Pin 4 | VCC β Digital supply voltage |
| Pin 5 | GND β Ground |
| Pin 6 | VCC β Digital supply voltage |
| Pin 7 | PB6 β Port B bit 6 (GPIO / XTAL1 / TOSC1) |
| Pin 8 | PB7 β Port B bit 7 (GPIO / XTAL2 / TOSC2) |
| Pin 9 | PD5 β Port D bit 5 (GPIO / PCINT21 / OC0B / T1) |
| Pin 10 | PD6 β Port D bit 6 (GPIO / PCINT22 / OC0A / AIN0) |
| Pin 11 | PD7 β Port D bit 7 (GPIO / PCINT23 / AIN1) |
| Pin 12 | PB0 β Port B bit 0 (GPIO / PCINT0 / SS / OC1A) |
| Pin 13 | PB1 β Port B bit 1 (GPIO / PCINT1 / SCK / OC1B) |
| Pin 14 | PB2 β Port B bit 2 (GPIO / PCINT2 / MOSI / OC2A) |
| Pin 15 | PB3 β Port B bit 3 (GPIO / PCINT3 / MISO / OC1A) |
| Pin 16 | PB4 β Port B bit 4 (GPIO / PCINT4 / OC1B) |
| Pin 17 | PB5 β Port B bit 5 (GPIO / PCINT5 / OC1A) |
| Pin 18 | AVCC β ADC supply voltage |
| Pin 19 | PE0 β Port E bit 0 (ADC6 / PCINT8 / TWI1 / SPI1 functions on PB variant) |
| Pin 20 | AREF β Analog reference for ADC |
| Pin 21 | GND β Ground |
| Pin 22 | PE1 β Port E bit 1 (ADC7 / PCINT9 / TWI1 / SPI1 functions on PB variant) |
| Pin 23 | PC0 β Port C bit 0 (ADC0 / PCINT10) |
| Pin 24 | PC1 β Port C bit 1 (ADC1 / PCINT11) |
| Pin 25 | PC2 β Port C bit 2 (ADC2 / PCINT12) |
| Pin 26 | PC3 β Port C bit 3 (ADC3 / PCINT13) |
| Pin 27 | PC4 β Port C bit 4 (ADC4 / SDA / PCINT14) |
| Pin 28 | PC5 β Port C bit 5 (ADC5 / SCL / PCINT15) |
| Pin 29 | PC6 β Port C bit 6 (RESET, active low) |
| Pin 30 | PD0 β Port D bit 0 (GPIO / PCINT16 / RXD0) |
| Pin 31 | PD1 β Port D bit 1 (GPIO / PCINT17 / TXD0) |
| Pin 32 | PD2 β Port D bit 2 (GPIO / PCINT18 / INT0) |
Typical Applications
ATMEGA328PB-AU is suitable for 6 applications: Arduino-Compatible Maker Boards, Industrial Sensor Nodes, Battery-Powered IoT Devices, Consumer Appliance Control, Legacy ATmega328P Cost-Down Redesigns, Motor and Actuator Control.
Arduino-Compatible Maker Boards
The ATMEGA328PB-AU is the officially positioned successor to the ATmega328P inside the Arduino UNO R3 and Nano, making it the natural choice for new compatible board designs. It runs the same AVR instruction set at 16-20 MHz with 32 KB Flash, boots standard AVR/Arduino toolchains, and costs roughly one third of legacy 328P pricing. The second USART, I2C, and SPI let compatible boards expose extra headers without an external bridge chip. Designers should use the megaAVR ATmega328PB core so the added peripherals are sketch-accessible, and verify pins 19/22 (PE0/PE1) against any shield that expects 328P ADC6/ADC7-only behavior.
Recommended
Industrial Sensor Nodes
In factory and process sensing, the ATMEGA328PB-AU pairs its 10-bit ADC (7 external channels) with picoPower sleep modes reaching sub-uA currents, extending battery life in wireless sensor nodes. Dual TWI (I2C) buses allow isolation of a sensor bus from a display or actuator bus, while the 10-bit ADC handles ratiometric bridge and NTC inputs with internal reference. Industrial -40C to +85C temperature rating covers cabinet-mounted electronics, and Functional Safety (FuSa) support aids documented development flows. Typical usage places the MCU in power-down between sample cycles, waking via watchdog or pin-change interrupt, waking via watchdog or pin-change interrupt, sampling at 100 Hz-class rates.
Recommended
Battery-Powered IoT Devices
The ATMEGA328PB-AU's picoPower technology delivers microamp-class active currents and sub-uA power-down, critical for coin-cell and Li-SOCl2 powered IoT endpoints. With 32 KB Flash there is headroom for a full RF module driver plus OTA bootloader, while 4 KB SRAM (double the older 328) supports lightweight mesh stacks. The second SPI can dedicate one bus to a radio (e.g., sub-GHz transceiver) and the second I2C to a secure element or sensor. Engineers typically gate the radio rail from a GPIO and sleep in power-down between scheduled transmissions, achieving multi-month to multi-year battery runtimes depending on duty cycle.
Recommended
Consumer Appliance Control
White goods, small appliances, and HVAC controls use the ATMEGA328PB-AU for its cost position near $1.12 in volume (as of 2026-09-17), industrial temperature rating, and rich peripheral mix: dual USART for panel/UART diagnostics, timers for TRIAC-phase or relay control, and the 10-bit ADC for NTC temperature and user-pot sensing. The watchdog timer and brown-out detector improve field reliability, and the read-while-write ISP Flash supports in-field firmware updates over UART. Consolidating previously two-chip serial functions into the PB's second I2C/SPI removes external bridge ICs, lowering BOM cost per unit in high-volume production.
Recommended
Legacy ATmega328P Cost-Down Redesigns
For products built on the ATmega328P facing supply or price pressure, the ATMEGA328PB-AU offers a near drop-in migration on the identical 32-TQFP footprint: same 32 KB Flash, same AVR core, software-backward-compatible code and fuses. During the chip crisis the PB sold for roughly one third of 328P pricing with far better availability, and that cost gap persists as of 2026-09-17. The only hardware review points are pins 19 and 22 (PE0/PE1 with added digital functions versus ADC6/ADC7-only). Teams typically recompile firmware with the PB device pack, run signature-adjusted programming, and qualify with a single board spin.
Recommended
Motor and Actuator Control
The ATMEGA328PB-AU drives small DC and stepper motors using its two 8/16-bit timer/counters with PWM outputs, an external interrupt set for quadrature/encoder feedback, and the analog comparator for current-limit protection. Dual SPI buses can split an external gate-driver interface from a config EEPROM, while the second USART streams diagnostics. Running at 20 MHz delivers 1 MIPS/MHz headroom for PI loops at kHz rates on the AVR core. Designs typically PWM at 20 kHz or above to stay out of audible range, and use the watchdog plus brown-out reset to guarantee safe actuator states during brown-out events in motor-heavy systems.
Recommended
Recommended Products Summary
Engineering reference data for ATMEGA328PB-AU β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ATMEGA328PB-AN | ATMEGA328P-AU | ATMEGA328-AU | ATMEGA168PB-AUR | ATMEGA168PA-AN |
|---|---|---|---|---|---|---|
| Package | 32-TQFP (7 x 7 mm) | 32-TQFP (7 x 7 mm) - same | 32-TQFP (7 x 7 mm) - same | 32-TQFP (7 x 7 mm) - same | 32-TQFP (7 x 7 mm) - same | 32-TQFP (7 x 7 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 32 KB (16K x 16) | 32 KB | 32 KB | 32 KB | 16 KB | 16 KB |
| SRAM | 4 KB | 4 KB | 2 KB | 2 KB | 1 KB | 1 KB |
| EEPROM | 2 KB | 2 KB | 1 KB | 1 KB | 512 B | 512 B |
| Max Speed | 20 MHz | 20 MHz | 20 MHz | 16 MHz | 20 MHz | 20 MHz |
| USART / I2C / SPI Count | 2 / 2 / 2 | 2 / 2 / 2 | 1 / 1 / 1 | 1 / 1 / 1 | 1 / 1 / 2 | 1 / 1 / 1 |
| Software Compatibility | 328P-compatible core, added peripherals | Identical to this product | Baseline reference | Baseline (non-P) register set | Different signature, smaller memory map | Different signature, smaller memory map |
Key Differentiators
- Doubled serial peripheral set in same footprint (vs ATMEGA328P-AU)
- Double the SRAM and EEPROM of the legacy part (vs ATMEGA328-AU)
- Significantly lower cost than the 328P at equal specs (vs ATMEGA328P-AU)
Design Notes
Connect AVCC (pin 18) to VCC through a low-pass filter (e.g., 10 uH inductor or ferrite bead plus 100 nF capacitor) when ADC accuracy matters, and tie AREF (pin 20) to ground via a 100 nF capacitor only - never drive it directly. Use all three GND pins (3, 5, 21) with solid via stitching to the ground plane. Decouple both VCC pins (4, 6) with 100 nF ceramics placed within 2 mm of each pin, per the Microchip datasheet 40001906 supply recommendations.
The most common 328P-to-328PB migration error is ignoring pins 19 and 22. On the 328P these were analog-only ADC6/ADC7; on the 328PB they are PE0/PE1 with digital Port E functions and can drive logic during reset states. If a legacy board uses these pins for analog sensing only, verify no pull-up activation occurs in reset; otherwise add external circuit protection. Also update device signatures in ISP programming scripts - the 328PB signature differs and programmers will refuse a 328P-targeted fuse file.
At 20 MHz the ATMEGA328PB-AU requires approximately 4.5V to 5.5V supply per the AVR frequency-voltage derating curve in datasheet 40001906; running at 3.3V limits maximum safe clock to roughly 13-14 MHz (estimated from the standard AVR derating curve - verify against the datasheet figure). For battery designs, exploit picoPower modes: power-down current is sub-uA, and the watchdog or pin-change interrupt can wake the core. Gate external peripheral rails (RF module, sensors) from GPIOs to eliminate sleep leakage that would otherwise dominate the budget.
When using the crystal on PB6/PB7 (pins 7/8), keep the crystal and two load capacitors within 5 mm of the pins and guard them with ground pour to avoid stray coupling from PWM outputs. The second SPI and I2C buses on PE0/PE1 share pins with ADC6/ADC7 - if both analog sensing and the second bus are needed, route the analog lines short and star-grounded, or dedicate PE0/PE1 to one function only to prevent digital switching noise corrupting ADC readings.
Compliance Information
RoHS status per distributor listings for current Microchip production (Au suffix, lead-free matte-tin TQFP). Verify REACH and conflict-minerals declarations via Microchip's official product compliance portal.