ADS61B23 - 12-Bit 80MSPS ADC with Buffered Inputs | TI
MPN: ADS61B23 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $24.5 | $24.50 |
| 10 | $22.1 | $221.00 |
| 100 | $19.8 | $1,980.00 |
| 500 | $17.5 | $8,750.00 |
| 1,000 | $15.9 | $15,900.00 |
Drop-in alternatives for ADS61B23 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
ADS61B23IRHBR
β Drop-Inπ Reference alternative (not in catalog)
ADS61B23IRHBT
β Drop-Inπ Reference alternative (not in catalog)
ADS61B23
β Drop-Inβ In Stock
$15.9 / Unit
View Datasheet βADS61B23IRHBR
β Drop-Inπ Reference alternative (not in catalog)
ADS61B23 Maximum Ratings & Electrical Characteristics
| Resolution | 12 bits |
| Sampling Rate | 80 MSPS |
| Number of Inputs | 1 |
| Input Type | Differential |
| Architecture | Pipelined |
| SNR | 69.5 dBFS |
| SFDR | 84 dBc |
| Analog Supply Voltage | 3.3 V |
| Digital Supply Voltage | 1.8 V |
| Power Dissipation | 380 mW |
| Input Capacitance | < 2 pF |
| Package | 32-VQFN (5x5 mm) |
| Operating Temperature Range | -40C to +85C |
| Reference Mode | Internal or External |
| Output Interface | LVDS or CMOS |
ADS61B23 Pin Configuration
| Pin 1 | AVDD β Analog power supply (3.3V) |
| Pin 2 | AVSS β Analog ground |
| Pin 3 | INP β Non-inverting analog input |
| Pin 4 | INM β Inverting analog input |
| Pin 5 | AVSS β Analog ground |
| Pin 6 | CLKP β Non-inverting clock input |
| Pin 7 | CLKM β Inverting clock input |
| Pin 8 | AVDD β Analog power supply (3.3V) |
| Pin 9 | DRVDD β Digital output driver supply (1.8V) |
| Pin 10 | DRGND β Digital output driver ground |
| Pin 11 | D0 β Digital output bit 0 (LSB) |
| Pin 12 | D1 β Digital output bit 1 |
| Pin 13 | D2 β Digital output bit 2 |
| Pin 14 | D3 β Digital output bit 3 |
| Pin 15 | D4 β Digital output bit 4 |
| Pin 16 | D5 β Digital output bit 5 |
| Pin 17 | D6 β Digital output bit 6 |
| Pin 18 | D7 β Digital output bit 7 |
| Pin 19 | D8 β Digital output bit 8 |
| Pin 20 | D9 β Digital output bit 9 |
| Pin 21 | D10 β Digital output bit 10 |
| Pin 22 | D11 β Digital output bit 11 (MSB) |
| Pin 23 | DRGND β Digital output driver ground |
| Pin 24 | DRVDD β Digital output driver supply (1.8V) |
| Pin 25 | PDN β Power down (active high) |
| Pin 26 | SLEEP β Sleep mode (active high) |
| Pin 27 | SDO β Serial data output for configuration |
| Pin 28 | SCLK β Serial clock input for configuration |
| Pin 29 | SDENB β Serial data enable (active low) |
| Pin 30 | AVDD β Analog power supply (3.3V) |
| Pin 31 | AVSS β Analog ground |
| Pin 32 | AVSS β Analog ground (exposed pad) |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this component. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
ADS61B23 is suitable for 6 applications: Wireless Base Stations, Software-Defined Radio, Radar Systems, Medical Ultrasound, High-Speed Data Acquisition, Communications Receivers.
Wireless Base Stations
The ADS61B23's 80 MSPS sampling rate and 12-bit resolution enable direct IF sampling in wireless base stations, digitizing intermediate frequency signals with high fidelity. Its buffered inputs simplify the analog front-end, reducing component count and design complexity. The high SFDR of 84 dBc ensures minimal distortion in multi-carrier environments, while the low power consumption of 380 mW helps manage thermal budgets in dense base station equipment.
Recommended
Software-Defined Radio
In software-defined radios, the ADS61B23 digitizes wideband RF signals for digital processing. Its 12-bit resolution and 80 MSPS sampling rate capture a broad spectrum with good dynamic range, while the buffered inputs present a low capacitive load to the RF front-end, preserving signal integrity. The device's high SNR of 69.5 dBFS supports weak signal detection, and the flexible LVDS/CMOS output interface simplifies connection to FPGAs or DSPs.
Recommended
Radar Systems
The ADS61B23 is well-suited for radar systems requiring high-speed, high-resolution digitization of return signals. Its 80 MSPS sampling rate captures fast-moving targets, while the 12-bit resolution provides fine amplitude discrimination. The buffered inputs isolate the ADC from the radar receiver's impedance variations, ensuring consistent performance. The device's low power consumption is advantageous in phased-array radar modules where heat dissipation is a concern.
Recommended
Medical Ultrasound
In medical ultrasound systems, the ADS61B23 digitizes echo signals from transducers with high fidelity. Its 12-bit resolution and 80 MSPS sampling rate capture fine details in the ultrasound image, while the buffered inputs simplify the interface to the transducer array. The low power consumption is critical for portable ultrasound devices, and the small VQFN package saves board space in compact handheld units.
Recommended
High-Speed Data Acquisition
The ADS61B23 is ideal for high-speed data acquisition systems in test and measurement equipment. Its 80 MSPS sampling rate and 12-bit resolution allow accurate capture of transient signals, while the buffered inputs reduce kickback and simplify front-end design. The device's high SNR and SFDR ensure reliable measurement of small signals in the presence of noise, making it suitable for oscilloscopes, spectrum analyzers, and data loggers.
Recommended
Communications Receivers
The ADS61B23 is used in communications receivers for direct IF sampling, converting intermediate frequency signals to digital for demodulation. Its 12-bit resolution and 80 MSPS sampling rate support wideband signals, while the buffered inputs present a stable load to the IF amplifier. The high SFDR of 84 dBc minimizes intermodulation distortion, and the low power consumption is beneficial for multi-channel receiver designs.
Recommended
Recommended Products Summary
Engineering reference data for ADS61B23 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ADS61B23IRHBR | ADS61B23IRHBT | ADS61B23EVM |
|---|---|---|---|---|
| Package | 32-VQFN (5x5 mm) | 32-VQFN (5x5 mm) | 32-VQFN (5x5 mm) | Evaluation Module |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits |
| Sampling Rate | 80 MSPS | 80 MSPS | 80 MSPS | 80 MSPS |
| SNR | 69.5 dBFS | 69.5 dBFS | 69.5 dBFS | 69.5 dBFS |
| SFDR | 84 dBc | 84 dBc | 84 dBc | 84 dBc |
| Power Dissipation | 380 mW | 380 mW | 380 mW | N/A (board) |
| Input Type | Differential | Differential | Differential | Differential |
Key Differentiators
- Buffered analog inputs (vs ADS61B23IRHBR)
- Internal reference (vs ADS61B23IRHBT)
- Low power consumption (vs ADS61B23EVM)
Design Notes
Use separate analog (3.3V) and digital (1.8V) supplies with proper decoupling. Place 0.1uF and 10uF capacitors close to each supply pin. A ferrite bead on the analog supply can reduce high-frequency noise from the digital supply.
Keep analog input traces short and shielded to minimize noise pickup. Use a solid ground plane and avoid routing digital signals near the analog input. The exposed pad should be soldered to the ground plane for thermal and electrical performance.
Ensure the sampling clock has low jitter to achieve the specified SNR. Use a high-quality clock source and route it away from digital outputs. Set the input common-mode voltage to the recommended level (typically mid-supply) to avoid clipping and maintain linearity.
Compliance Information
RoHS compliant per TI product page. Not AEC-Q100 qualified.
