EP1AGX90EF1152I6 - Arria GX FPGA, 90K LE, 1152-FBGA | Intel
MPN: EP1AGX90EF1152I6 ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1850 | $1,850.00 |
| 10 | $1725 | $17,250.00 |
| 100 | $1560 | $156,000.00 |
| 500 | $1395 | $697,500.00 |
| 1,000 | $1245 | $1,245,000.00 |
Drop-in alternatives for EP1AGX90EF1152I6 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
EP1AGX90EF1152C6N
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View Datasheet →EP1AGX90EF1152C6
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View Datasheet →EP1AGX90EF1152C5
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View Datasheet →EP1AGX60EF1152I6N
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View Datasheet →EP1AGX60EF1152C6N
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View Datasheet →EP1AGX90EF1152I6 Maximum Ratings & Electrical Characteristics
| Manufacturer | Intel (formerly Altera) |
| Series | Arria GX |
| Family | Arria GX FPGA |
| Process Technology | 90 nm |
| Logic Elements (LEs) | 90220 |
| Number of LABs/CLBs | 4511 |
| Total RAM Bits | 4477824 |
| User I/O Count | 538 |
| Number of Logic Elements/Cells | 90220 |
| Core Supply Voltage | 1.15 V to 1.25 V |
| Package / Case | 1152-BBGA, FCBGA |
| Supplier Device Package | 1152-FBGA (35 x 35 mm) |
| Operating Temperature | -40 C to +100 C (Industrial) |
| Mounting Type | Surface Mount |
| Embedded Transceiver Channels | Up to 4 channels |
| Speed Grade | 6 |
| Configuration Mode | PS / FPP / JTAG |
| Number of Pins | 1152 |
EP1AGX90EF1152I6 1152-fbga (35 x 35 mm) Pin Configuration Guide
Complete pinout information for EP1AGX90EF1152I6 (1152-fbga (35 x 35 mm) package) with 1152 pins. This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for EP1AGX90EF1152I6.
Refer to the datasheet for full pin configuration.
Estimated pin count: 1152 pins (digital package)
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
EP1AGX90EF1152I6 is suitable for 6 applications: Wireline Telecom Line Cards, Military and Aerospace Signal Processing, Video Broadcast Infrastructure, Medical Imaging Backplanes, High-Speed Data Acquisition Systems, Software Defined Radio (SDR) Platforms.
Wireline Telecom Line Cards
The EP1AGX90EF1152I6 fits telecom line cards because its 90,220 logic elements and integrated multi-gigabit transceivers (up to 3.125 Gbps) handle channelized TDM, packet processing, and framer/mapper functions in a single device. The 4,477,824 bits of embedded RAM buffer traffic bursts, while 538 user I/Os break out to external PHY devices and backplane connectors. Industrial temperature rating (-40 C to +100 C) suits central office and outdoor cabinet deployments. The Arria GX transceiver macro supports OC-48, Gigabit Ethernet, and XAUI interfaces commonly found in SONET/SDH and Ethernet aggregation platforms.
Recommended
Military and Aerospace Signal Processing
The EP1AGX90EF1152I6 is well-suited for military and aerospace DSP applications because its 90,220 LEs host hundreds of parallel DSP pipelines for radar pulse compression, digital beamforming, and electronic countermeasure algorithms. The industrial temperature rating and Flip-Chip BGA package provide mechanical robustness for vibration-prone environments when paired with proper underfill. Transceiver channels enable high-speed digitizer-to-processor links for software-defined radio architectures, while 4 Mbits of embedded RAM support FFT windowing and correlation buffers. Designers should review MIL-STD-810 shock/vibration test data when integrating this device into ruggedized enclosures.
Recommended
Video Broadcast Infrastructure
The EP1AGX90EF1152I6 supports broadcast video processing because its 90K logic elements handle multi-channel SD/HD/3G-SDI bridging, color space conversion, and on-screen-display composition simultaneously. The 538 user I/Os accommodate parallel video buses, while transceivers drive SDI coax outputs up to 3 Gbps through external cable drivers. Embedded RAM (4,477,824 bits) acts as frame buffers and audio/video delay lines for lip-sync correction. Designers should use Quartus II's SDI megafunction IP to accelerate development; expect approximately 2,500 LEs per 3G-SDI channel with embedded audio.
Recommended
Medical Imaging Backplanes
The EP1AGX90EF1152I6 fits medical imaging systems such as ultrasound scanners and CT/MRI backplanes because its 90K LEs process real-time beamforming, image reconstruction, and DICOM network interfaces within one device. The transceivers deliver high-speed link to ADC front-ends at sample rates up to 3.125 Gbps, while embedded RAM stores line buffers for image reconstruction. Industrial temperature grade suits the controlled environment of imaging carts and operating rooms. The 1152-FBGA's 35 x 35 mm footprint fits standard medical-embedded form factors when paired with a 6+ layer PCB.
Recommended
High-Speed Data Acquisition Systems
The EP1AGX90EF1152I6 serves high-speed data acquisition because its 90K logic elements run parallel DSP blocks for FIR filtering, decimation, and FFT computation at hundreds of MSPS, while 4 Mbits of embedded RAM buffer sample streams before DMA to host processors. The transceiver channels accept LVDS or serial ADC outputs up to 3.125 Gbps, eliminating external deserializer ICs. With 538 user I/Os, designers can interface to multiple ADC/DAC channels and external DDR/DDR2 memory through dedicated controllers. Industrial temperature rating supports test-and-measurement equipment operating in lab and field environments.
Recommended
Software Defined Radio (SDR) Platforms
The EP1AGX90EF1152I6 is a strong fit for SDR platforms because its 90,220 LEs host digital IF processing, channelization, and protocol stack termination while the multi-gigabit transceivers interface to RF front-ends via JESD204B or serial RapidIO. The 4 Mbits of embedded RAM support symbol-rate buffering and FFT scratch space, and 538 user I/Os connect to host processors, DDR memory, and auxiliary DACs for signal generation. Designers should plan for at least 1 W of power per 100K LEs at full toggle rate and provide robust thermal management via the FC-BGA's exposed die surface.
Recommended
Recommended Products Summary
Engineering reference data for EP1AGX90EF1152I6 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | EP1AGX90EF1152C6N | EP1AGX90EF1152C6 | EP1AGX90EF1152C5 | EP1AGX60EF1152I6N | EP1AGX60EF1152C6N |
|---|---|---|---|---|---|---|
| Package | 1152-FBGA (35x35 mm) | 1152-FBGA (35x35 mm) - same | 1152-FBGA (35x35 mm) - same | 1152-FBGA (35x35 mm) - same | 1152-FBGA (35x35 mm) - same | 1152-FBGA (35x35 mm) - same |
| Brand | Intel | Intel | Intel | Intel | Intel | Intel |
| Logic Elements | 90220 | 90220 | 90220 | 90220 | 60000 | 60000 |
| Total RAM Bits | 4477824 | 4477824 | 4477824 | 4477824 | [DATA_NEEDED] | [DATA_NEEDED] |
| User I/O Count | 538 | 538 | 538 | 538 | [DATA_NEEDED] | [DATA_NEEDED] |
| Operating Temperature | -40C to +100C (Industrial) | 0C to +85C (Commercial) | 0C to +85C (Commercial) | 0C to +85C (Commercial) | -40C to +100C (Industrial) | 0C to +85C (Commercial) |
| Speed Grade | 6 | 6 | 6 | 5 (slower) | 6 | 6 |
| Process Technology | 90 nm | 90 nm | 90 nm | 90 nm | 90 nm | 90 nm |
| Core Supply Voltage | 1.15V to 1.25V | 1.15V to 1.25V | 1.15V to 1.25V | 1.15V to 1.25V | 1.15V to 1.25V | 1.15V to 1.25V |
| Lifecycle Status | NRND | NRND | NRND | NRND | NRND | NRND |
Key Differentiators
- Highest logic density in the EP1AGX90 family at industrial temperature grade (vs EP1AGX60EF1152I6N)
- Industrial temperature range operation (vs EP1AGX90EF1152C6N)
- Speed grade 6 timing margin vs speed grade 5 (vs EP1AGX90EF1152C5)
Design Notes
The 1152-FBGA flip-chip package dissipates significant heat through the die backside; at full toggle rate (~80% utilization) and 1.2 V core, the EP1AGX90EF1152I6 draws approximately 4-6 W. A heatsink or thermal interface material is required for closed-enclosure designs, and PCB copper pours on the top/bottom layers under the BGA should be maximized per the Arria GX Thermal Management Guide. Estimated: at 5 W dissipation with theta_JA of 14 C/W (still air), junction temperature rises 70 C above 25 C ambient, reaching 95 C - within industrial spec but with little margin.
The 1152-FBGA 35 x 35 mm package requires a minimum 6-layer PCB stack-up with buried vias for signal escape, per Altera's BGA PCB Layout Guidelines. Use 1.0 mm ball pitch with 0.5 mm via pad diameter and microvia or laser-drilled via technology for inner-row escape. Maintain 100 ohm differential impedance for transceiver channels with length matching within 5 mil across all P and N pairs. Decoupling capacitors must be placed within 100 mil of each power pin.
Multi-gigabit transceiver channels require AC-coupled interfaces with 0.1 uF capacitors on each serial line; the EP1AGX90EF1152I6 supports data rates up to 3.125 Gbps per channel. Reference clock jitter must be below 1 ps RMS for reliable link operation - use a low-jitter clock generator such as an Si5317 or equivalent. Pre-emphasis and equalization settings should be configured via the ALTGX megafunction in Quartus II, with IBIS-AMI models used for channel simulation before PCB fabrication.
Do not confuse the EP1AGX90E (Arria GX Enhanced) with the original EP1AGX90 - the Enhanced variants added dedicated hard IP for PCI Express and external memory controllers. Quartus II software version 9.1 SP2 or later is required for the EF1152 device - earlier versions will not recognize the speed grade 6 timing models. When migrating between temperature grades (I6 vs C6), verify that the JTAG IDCODE matches the expected value before programming.
Compliance Information
RoHS and lead-free status not explicitly stated in the Verified Web Data and marked [DATA_NEEDED]. The Arria GX family was originally released before RoHS transition; later production lots may be RoHS-compliant per Intel's PCN notices. AEC-Q100 not applicable - this is an FPGA, not an automotive-qualified IC.
