Intel

EPF10K20TC144-3N - FLEX 10K FPGA 20K Gates 102 I/O TQFP-144 | Intel

MPN: EPF10K20TC144-3N ✗ End of Life

In Stock Ships in 1-3 business days

5 V Vdss 144-LQFP / TQFP-144 Package 125 MHz Speed 12,288 Memory

From $20.85 USD / Unit

MOQ: 1 |

Price updated: 2026-09-11

Volume Pricing

Qty	Unit Price	Extended
1	$38.5	$38.50
10	$34.2	$342.00
100	$28.95	$2,895.00
500	$24.1	$12,050.00
1,000	$20.85	$20,850.00

ℹ️ All prices are in USD

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EPF10K20TC144-3N Overview

The Intel EPF10K20TC144-3N is a member of the FLEX 10K family of Field Programmable Gate Arrays (FPGAs), delivering approximately 20,000 gates, 1,152 logic elements (cells), and 12,288 bits of embedded memory in a 144-pin TQFP (LQFP) surface-mount package with 102 user I/O pins. Fabricated on a 0.42 µm CMOS process and rated for 125 MHz internal operation at 5 V core, the -3N speed/packaging suffix indicates a commercial temperature grade with the standard performance tier.

A Field Programmable Gate Array (FPGA) is a semiconductor device built around an array of configurable logic blocks (CLBs), programmable interconnect, and dedicated I/O cells that can be reconfigured by the end user after manufacture. The FLEX 10K family belongs to the broader hierarchy of programmable logic devices (PLDs), positioned between simple Complex Programmable Logic Devices (CPLDs) and high-density SRAM-based FPGAs. FLEX 10K parts integrate Look-Up Table (LUT)-based logic with Embedded Array Blocks (EABs) that provide on-chip SRAM, enabling single-chip implementation of wide datapaths, glue logic, and small state machines without external memory.

Key specifications of the EPF10K20TC144-3N include 1,152 logic elements distributed across 144 Logic Array Blocks (LABs), 12,288 RAM bits, 102 maximum user I/O pins, and operation from a 5 V supply. The device supports in-system configuration via the Altera (now Intel) Quartus/MAX+PLUS II toolchain through a passive serial or JTAG interface. PCI-compliant I/O is supported on selected banks, allowing direct interface to 5 V PCI buses without external buffering.

The FLEX 10K architecture combines a fine-grained, SRAM-based logic fabric with Embedded Array Blocks (EABs) that can implement RAM, ROM, or multiplier functions. Each EAB provides 2,048 bits of memory configurable as 256x8, 512x4, 1024x2, or 2048x1, allowing efficient implementation of FIFOs and small lookup tables. Continuous FastTrack interconnect routes signals across the die with predictable delays, simplifying timing closure at the -3 speed grade.

Typical applications include telecommunications line cards, industrial control glue logic, PCI bus interfaces, prototyping platforms for ASIC migration, and legacy system upgrades where 5 V-tolerant I/O and embedded memory are required. The 144-pin TQFP package supports hand-soldering and socket-based prototyping, which remains valuable in maintenance and low-volume production.

When designing with this device, note that configuration data must be loaded from an external EPROM, Flash, or microcontroller on every power-up because the SRAM-based fabric is volatile. Plan JTAG or passive-serial header access for in-field reprogramming, and observe the 5 V VCCINT/VCCIO supply requirements which are not directly compatible with modern 3.3 V or 1.8 V logic without level translation.

This page synthesizes distributor stock, drop-in alternatives from the same FLEX 10K family, and practical design notes that extend the manufacturer datasheet with cross-reference and lifecycle information.

Drop-in alternatives for EPF10K20TC144-3N — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Variants in this series

Same-series models that are drop-in compatible with EPF10K20TC144-3N (same form factor and footprint) — differing in Operating Temperature, Package, Process Technology, Speed Grade, Typical Gates.

EPF10K10TC144-3

Intel

Operating Temperature: 0 °C to +85 °C (commercial)

Package: 144-pin TQFP (TQ144)

Speed Grade: -3 (commercial)