SN74HC126QPWRQ1 - Quad 3-State Buffer AEC-Q100 | Texas Instruments
MPN: SN74HC126QPWRQ1 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.62 | $0.62 |
| 10 | $0.55 | $5.50 |
| 100 | $0.41 | $41.00 |
| 500 | $0.33 | $165.00 |
| 1,000 | $0.27 | $270.00 |
| 3,000 | $0.23 | $690.00 |
SN74HC126QPWRQ1 Overview
A buffer with 3-state outputs is a digital logic element that passes its input level to the output when enabled and presents a high-impedance (Hi-Z) state when disabled, allowing multiple devices to share a common bus. Within the logic hierarchy, it belongs to the buffer/line-driver family of high-speed CMOS (HC) logic, itself a branch of the broader CMOS voltage-regulated logic category used in nearly every digital system.
Key features include four independent 1-bit buffers with separate OE control per channel, active-high enable inputs (the OE low state disables the output), and automotive qualification per AEC-Q100 for operation in harsh environments. The HC CMOS process delivers low static power consumption and balanced drive characteristics across the 2 V to 6 V operating range, with TTL-friendly noise margins at 5 V.
The 74HC126 architecture derives from the industry-standard 74126 pinout: each gate passes input A to output Y when OE is high; when OE is low the output enters Hi-Z. TI recommends tying OE to GND through a pull-down resistor during power-up and power-down to guarantee the high-impedance state, preventing bus contention in shared-bus systems such as microcontroller data buses and memory interfaces.
Typical applications include automotive body electronics and infotainment bus isolation, industrial PLC I/O line driving, and microcontroller GPIO buffering where tri-state control prevents driver conflicts. The TSSOP-14 package suits space-constrained automotive modules.
Design consideration: keep unused inputs (especially OE) tied to a defined logic level through a pull resistor; floating enables can cause unpredictable bus contention and increased supply current.
This page synthesizes distributor pricing, drop-in alternatives including Schmitt-trigger and AHC variants, and practical design notes not found in the manufacturer datasheet. Pricing data is as of 2026-09-10.
Drop-in alternatives for SN74HC126QPWRQ1 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with SN74HC126QPWRQ1 (same form factor and footprint) β differing in Input Type, Operating Temperature, Output Type, Package, Qualification.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
SN74HCS126QPWRQ1
β Drop-Inβ In Stock
$0.35 / Unit
View Datasheet βSN74AHC126QPWRQ1
β Drop-Inπ Reference alternative (not in catalog)
SN74AHCT126QPWRQ1
β Drop-Inπ Reference alternative (not in catalog)
SN74HC126PW
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
SN74HCS126QPWRQ1
β Drop-Inβ In Stock
$0.35 / Unit
View Datasheet βSN74HC126QPWRQ1 Maximum Ratings & Electrical Characteristics
| Function | Quadruple bus buffer with 3-state outputs (non-inverting) |
| Number of Elements | 4 |
| Bits per Element | 1 |
| Output Type | 3-State |
| Input Type | Standard CMOS (HC) |
| Supply Voltage Range | 2 V to 6 V |
| Output Enable | Active-high, per channel (OE low disables output) |
| Qualification | AEC-Q100 (automotive) |
| Package | TSSOP-14 (PW) |
| Mounting Type | Surface Mount |
| Operating Temperature | -40C to +125C (automotive range) |
| Logic Family | 74HC (High-Speed CMOS) |
| RoHS Status | Compliant |
SN74HC126QPWRQ1 Pin Configuration
| Pin 1 | 1OE β Output enable for buffer 1 (active high) |
| Pin 2 | 1A β Input of buffer 1 |
| Pin 3 | 1Y β 3-state output of buffer 1 |
| Pin 4 | 2OE β Output enable for buffer 2 (active high) |
| Pin 5 | 2A β Input of buffer 2 |
| Pin 6 | 2Y β 3-state output of buffer 2 |
| Pin 7 | GND β Ground |
| Pin 8 | 3Y β 3-state output of buffer 3 |
| Pin 9 | 3A β Input of buffer 3 |
| Pin 10 | 3OE β Output enable for buffer 3 (active high) |
| Pin 11 | 4Y β 3-state output of buffer 4 |
| Pin 12 | 4A β Input of buffer 4 |
| Pin 13 | 4OE β Output enable for buffer 4 (active high) |
| Pin 14 | VCC β Power supply, 2 V to 6 V |
Typical Applications
SN74HC126QPWRQ1 is suitable for 6 applications: Automotive Bus Isolation, Microcontroller GPIO Buffering, Industrial PLC I/O Modules, Memory and Peripheral Bus Sharing, Automotive Infotainment Modules, Test and Measurement Fixtures.
Automotive Bus Isolation
The SN74HC126QPWRQ1 fits automotive bus isolation because its AEC-Q100 qualification, -40C to +125C operating range, and 2 V to 6 V supply directly match body-control-module and gateway power rails. Each buffer's independent active-high OE pin lets the MCU tri-state a shared data or control bus during reset, fault, or diagnostics, preventing bus contention between multiple drivers. Placed between the MCU GPIO bank and a shared harness signal, the device adds no propagation-budget burden at typical HC speeds while providing a guaranteed Hi-Z state; the datasheet-recommended pull-down on OE ensures the bus stays released during power-up and power-down transients.
Recommended
Microcontroller GPIO Buffering
For MCU GPIO buffering, the SN74HC126QPWRQ1 provides four independently enabled 3-state drivers that offload drive current from sensitive microcontroller pins. When the 5 V MCU rail feeds the buffer, HC CMOS inputs switch at mid-supply thresholds compatible with 3.3 V logic at relaxed noise margins, and outputs deliver stronger drive than typical MCU GPIOs on capacitive harness or cable loads. The per-channel OE architecture supports one-wire or shared-line patterns where a single MCU pin must alternate between driving and releasing the line. Keep total prop-delay of the HC buffer in the timing budget and add 0.1 uF decoupling at pin 14.
Recommended
Industrial PLC I/O Modules
In industrial PLC I/O modules, the SN74HC126QPWRQ1 serves as a tri-state line driver between the logic controller and field-side circuitry on a 5 V rail. Its high-impedance output state allows multiple plug-in I/O channels to share a backplane data or enable line, and the 6 V maximum rating adds headroom against industrial rail tolerances. HC CMOS static current is negligible in the idle state, which matters in high-channel-count racks. When field signals arrive through long cables with slow edges, substitute the pin-compatible SN74HCS126QPWRQ1 whose Schmitt-trigger inputs reject ringing; both are footprint-identical, enabling one PCB for both variants.
Recommended
Memory and Peripheral Bus Sharing
The SN74HC126QPWRQ1 is well suited to memory and peripheral bus sharing, the classic 74126 use case. Multiple peripherals can drive a common data bus because each buffer's OE pin is gated by a decoder output, guaranteeing at most one active driver. With OE tied low through a pull-down during power-up, the datasheet-required Hi-Z default prevents contention while MCU supplies stabilize. HC propagation delay at 5 V is short enough for most parallel peripheral timing at moderate clock rates; for tight-setup buses, the pin-compatible SN74AHC126QPWRQ1 provides faster edges in the identical TSSOP-14 footprint, allowing a speed upgrade without respin.
Recommended
Automotive Infotainment Modules
Infotainment head units and display modules use the SN74HC126QPWRQ1 to gate enable and control lines between the SoC domain and power-management or backlight circuitry. The -40C to +125C AEC-Q100 range covers cabin and near-dashboard environments, and the tri-state outputs let the module release control lines during software reset so analog sections default safely off. On the 5 V rail, HC inputs cleanly resolve SoC GPIO levels and the buffers drive status LEDs or enable pins directly. Because OE polarity is active-high, firmware-controlled enables map naturally to a logic-high-means-on convention used by most power sequencing schemes in these modules.
Recommended
Test and Measurement Fixtures
In test and measurement fixtures, the SN74HC126QPWRQ1 implements addressable, tri-state stimulus channels: a fixture controller enables one of many buffer outputs onto a shared line while all others present high impedance, so the device-under-test sees a single defined driver. The 2 V to 6 V supply range lets one fixture design test parts at 3.3 V, 5 V, and margin conditions by simply varying the buffer supply. HC inputs tolerate the slow edges of relay-switched signal paths in many fixture cases, though the SN74HCS126QPWRQ1 Schmitt variant is the safer choice where relay settling produces sub-threshold ramps. Q1 qualification adds robustness for production-line environments.
Recommended
Recommended Products Summary
Engineering reference data for SN74HC126QPWRQ1 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | SN74HCS126QPWRQ1 | SN74AHC126QPWRQ1 | SN74AHCT126QPWRQ1 | SN74HC126PW |
|---|---|---|---|---|---|
| Package | TSSOP-14 (PW) | TSSOP-14 (PW) - same | TSSOP-14 (PW) - same | TSSOP-14 (PW) - same | TSSOP-14 (PW) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Input Stage | Standard CMOS (HC) | Schmitt-trigger | Standard CMOS (AHC) | TTL-compatible thresholds | Standard CMOS (HC) |
| Supply Voltage Range | 2 V to 6 V | 2 V to 6 V | 2 V to 5.5 V | 4.5 V to 5.5 V | 2 V to 6 V |
| AEC-Q100 Qualification | Yes | Yes | Yes | Yes | No (commercial grade) |
| Speed / Drive | HC family (moderate) | HC family (moderate) | Faster (AHC family) | Faster (AHCT family) | HC family (moderate) |
| Relative Cost | Low | Moderate (Schmitt feature premium) | Moderate (faster process premium) | Moderate | Lowest (non-automotive) |
Key Differentiators
- Wide 6 V supply tolerance (vs SN74AHC126QPWRQ1)
- Lowest cost in same footprint (vs SN74HCS126QPWRQ1)
- Automotive qualification retained (vs SN74HC126PW)
Design Notes
TI datasheet guidance for the 74x126 family: tie each OE input to GND through a pull-down resistor (e.g. 10 kOhm) so outputs default to high impedance during power-up and power-down. A floating OE can glitch high mid-ramp, causing two drivers to contend on a shared bus and potentially overstress outputs. Never leave buffer inputs floating either - unused A inputs should be tied to GND or VCC to prevent oscillation and excess ICC.
Estimated: HC CMOS static supply current is near zero, but dynamic ICC scales with frequency and load capacitance per P = C*V^2*f. For four outputs driving 50 pF loads at 5 V and 10 MHz, dissipation is roughly 4 * 50e-12 * 25 * 1e7 = 50 mW - negligible in TSSOP-14, so no thermal design is required. Add a 0.1 uF ceramic decoupling capacitor at pin 14 close to the device, plus bulk capacitance per board rail.
On long harness or cable-driven signals, the standard HC input lacks hysteresis and can oscillate on slow edges near the switching threshold. If input rise/fall times approach the HC family's specified maximum, switch to the pin-identical SN74HCS126QPWRQ1 with Schmitt-trigger inputs - no layout change needed. Series termination (22-33 ohm) on outputs driving unterminated cables reduces ringing.
Compliance Information
AEC-Q100 qualification per the Q1 suffix and TI automotive product listing. RoHS/lead-free per current TI catalog production; REACH and halogen declarations should be confirmed via TI material certificates.
