ADS821 - 10-Bit 40MSPS ADC Internal Ref | TI
MPN: ADS821 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.65 | $166.50 |
| 100 | $14.8 | $1,480.00 |
| 500 | $13.3 | $6,650.00 |
| 1,000 | $11.95 | $11,950.00 |
Drop-in alternatives for ADS821 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
ADS825U
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
ADS826U
β Drop-Inπ Reference alternative (not in catalog)
TLC5510I
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
AD9200ARS
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
ADS821UG4
β Drop-Inπ Reference alternative (not in catalog)
ADS821 Maximum Ratings & Electrical Characteristics
| Resolution | 10 bit |
| Sampling Rate | 40 MSPS |
| Architecture | Pipelined |
| Number of Inputs | 1 |
| Input Type | Differential or Single-Ended |
| Supply Voltage | +5 V single supply |
| Power Dissipation | 380 mW |
| SNR | 58 dB |
| Reference | Internal |
| Track-and-Hold | Internal |
| Power Down | Yes |
| Missing Codes | No missing codes |
| Package | SO-28 / SSOP-28 |
| Mounting Type | Surface Mount |
| Process Technology | Small geometry CMOS |
| Output Interface | Parallel CMOS |
ADS821 Pin Configuration
| Pin 1 | IN β Analog input (+) / single-ended input |
| Pin 2 | COM β Common-mode / reference bypass |
| Pin 3 | REF β Internal reference output |
| Pin 4 | REFT β Reference top sense |
| Pin 5 | REFB β Reference bottom sense |
| Pin 6 | AVDD β Analog supply +5V |
| Pin 7 | AGND β Analog ground |
| Pin 8 | DVDD β Digital supply +5V |
| Pin 9 | DGND β Digital ground |
| Pin 10 | CLK β Sampling clock input |
| Pin 11 | PD β Power-down control |
| Pin 12 | OE β Output enable |
| Pin 14-23 | D0-D9 β 10-bit parallel CMOS data output |
| Pin 28 | OVR β Overrange flag output |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this component. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
ADS821 is suitable for 6 applications: Medical Ultrasound Digitizing, Digital Storage Oscilloscope Front-End, Video and CCD Digitizing, Industrial Data Acquisition, Communications IF Sampling, Test and Measurement Instrumentation.
Medical Ultrasound Digitizing
The ADS821 fits ultrasound beamformer receive chains where 40 MSPS sampling covers the transducer IF content and 58 dB SNR preserves gray-scale image quality. Its internal track-and-hold removes an external S/H amplifier per channel, and 380 mW per converter keeps multi-channel probe front-ends inside typical power budgets. Designers pair it with low-noise VGA outputs driven differentially to exploit common-mode rejection and reduce even-order distortion in the image path.
Recommended
Digital Storage Oscilloscope Front-End
Entry-level DSO channels use the ADS821 for 40 MSPS waveform capture. The pipelined architecture delivers one conversion per clock cycle, and no missing codes guarantees monotonic waveform display. The single +5V supply simplifies instrument power rails, while the power-down mode conserves power in multi-channel scopes during idle time. An OPA698 or similar high-speed op-amp buffers the front-end attenuator into the differential input for settled sampling within the 25 ns period.
Recommended
Video and CCD Digitizing
The ADS821 digitizes composite video and CCD sensor outputs where pixel rates fall within 40 MSPS. Its 58 dB SNR supports broadcast-grade luminance accuracy, and single-ended input mode directly accepts AC-coupled video via clamp circuitry. The internal reference removes external reference ICs, reducing BOM cost per channel in multi-channel video capture cards; differential mode suits differential-output CCD readout paths with improved common-mode noise rejection.
Recommended
Industrial Data Acquisition
Industrial acquisition boards digitize sensor and IF signals with the ADS821 where 10-bit resolution and 40 MSPS suffice. The parallel CMOS output interfaces directly to FPGAs or DSPs, and the +5V rail matches legacy industrial logic. Power-down mode cuts consumption between bursts in triggered acquisition systems. Solid grounding and supply decoupling preserve the 58 dB SNR in electrically noisy factory environments near drives and switching converters.
Recommended
Communications IF Sampling
Receiver IF chains sample intermediate frequencies directly with the ADS821 at up to 40 MSPS. Differential input operation suppresses common-mode LO feedthrough and lowers even-order harmonics, improving spurious-free dynamic range before digital down-conversion. At 380 mW, the converter suits compact radio designs where per-channel power matters, and the internal reference removes a dedicated reference IC from the receive card layout.
Recommended
Test and Measurement Instrumentation
Bench instruments, spectrum-scan receivers, and automated test channels use the ADS821 as a compact 10-bit digitizer. The complete converter (internal reference plus track-and-hold) shortens design time, while 40 MSPS supports fast transient capture. The power-down pin enables duty-cycled measurements that extend battery life in portable instruments, and the SO-28 through-hole-friendly footprint eases prototyping and rework on test fixtures.
Recommended
Recommended Products Summary
Engineering reference data for ADS821 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ADS825U | ADS826U | TLC5510I | AD9200ARS |
|---|---|---|---|---|---|
| Package | SO-28 / SSOP-28 | SO-28 | SO-28 | SO-28 | SOIC-28 |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Analog Devices |
| Resolution | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit |
| Sampling Rate | 40 MSPS | 40 MSPS | 60 MSPS | 20 MSPS | 20 MSPS |
| Power Dissipation | 380 mW | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
| SNR | 58 dB | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
| Supply Voltage | +5 V single | +5 V | +5 V | +5 V | +5 V / +3 V |
| Internal Reference | Yes | Yes | Yes | Yes | Yes |
| Price (1 pc, as of 2026-08-30) | $18.50 | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
Key Differentiators
- Lowest power in TI 10-bit 40MSPS class (vs ADS826U)
- Fully integrated reference and track-and-hold (vs TLC5510I)
- Differential input capability (vs AD9200ARS)
Design Notes
Drive the ADS821 analog input from a low-impedance source or high-speed op-amp (e.g., OPA2670 for differential drive). The internal track-and-hold must settle within one 25 ns sample period (40 MSPS); a source impedance above a few hundred ohms will cause droop errors and SNR loss. Keep the input trace short, matched, and referenced to a clean analog ground plane.
Decouple every AVDD and DVDD pin with 0.1uF ceramics placed within 3-5 mm of the pin, plus 10uF bulk per rail. Partition analog and digital grounds under the SO-28 and join them at a single point beneath the ADC. Route the CLK line away from the analog input to avoid clock feedthrough artifacts in the output spectrum.
Do not exceed the 40 MSPS clock rate specified in the TI datasheet; pipelined performance (58 dB SNR, no missing codes) is guaranteed only within the rated range. Use the power-down pin during idle periods to cut consumption, but allow reference settling time after wake-up before resuming acquisition, or the first samples may be inaccurate.
At 380 mW on a +5V rail the ADS821 draws roughly 76 mA total; size linear regulators and thermal copper accordingly. For battery or portable instruments, assert power-down between acquisition bursts - the power-down feature is internal to the converter and eliminates the need for supply switching FETs.
Compliance Information
ADS821UG4 suffix indicates TI G4 (Pb-free) packaging; full RoHS/REACH certificates should be confirmed via TI product page.
