Intel

EP2AGX190EF29I5G - Arria II GX FPGA 181K LE | Intel | 780-FBGA

MPN: EP2AGX190EF29I5G ✓ Active

In Stock Ships in 1-3 business days

0.9 V Vdss 780-FBGA (flip-chip BGA) Package 500 MHz Speed 10,177,536 bits Memory

From $1900 USD / Unit

MOQ: 1 |

Price updated: 2026-09-08

Volume Pricing

Qty	Unit Price	Extended
1	$2463.09	$2,463.09
10	$2350	$23,500.00
100	$2180	$218,000.00
250	$2050	$512,500.00
500	$1900	$950,000.00

ℹ️ All prices are in USD

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EP2AGX190EF29I5G Overview

The Intel EP2AGX190EF29I5G is a high-density Arria II GX field-programmable gate array (FPGA) delivering 181,165 logic elements, 10,177,536 memory bits, and integrated transceivers in a 780-ball flip-chip BGA package. Built on a 40 nm low-power process, it operates from a 0.9 V core supply and supports up to 500 MHz fabric performance with 372 user I/O pins.

An FPGA (Field-Programmable Gate Array) is a semiconductor device whose digital logic, interconnect, and I/O behavior are defined by a user-supplied configuration bitstream rather than at silicon fab time. FPGAs sit in the broader hierarchy of programmable logic devices (PLDs) and are commonly used to prototype ASICs, accelerate parallel workloads, and implement custom I/O protocols. Arria II GX specifically targets mid-range applications that require integrated multi-gigabit transceivers (up to 6.375 Gbps) and moderate logic density, sitting between the lower-cost Cyclone family and the high-end Stratix family in Intel's FPGA portfolio.

Key features of the EP2AGX190EF29I5G include integrated transceivers supporting PCI Express Gen1/Gen2, Serial RapidIO, Gigabit Ethernet, and multiple CPRI/OBSAI data rates; dedicated on-chip memory blocks (M9K/M144K); embedded DSP blocks for high-performance fixed- and floating-point arithmetic; and 8-input adaptive logic modules (ALMs) that pack twice the effective logic of prior 4-input LUT architectures. The device also includes hard memory controllers, PLLs, and dynamic reconfiguration support.

The Arria II GX architecture combines a logic fabric with hard intellectual-property (IP) blocks such as transceivers, PCIe hard IP, and external memory interfaces. This integration reduces logic overhead typically spent serializing/deserializing data, freeing ALMs for application code while delivering deterministic latency across all six transceiver channels at line rates up to 6.375 Gbps.

Typical applications include wireless baseband processing, broadcast video infrastructure, military secure communications, high-performance DSP for radar/sonar, PCIe Gen2 endpoint/root-port cards, and high-speed serial protocol bridging. The 780-pin FC-FBGA package supports the transceiver channels, 372 user I/Os, and high-density power/ground distribution needed for industrial and defense-grade designs.

When designing with this device, plan power distribution carefully: the 0.9 V core rail can draw tens of amperes under full fabric and transceiver utilization, requiring multi-layer PCB stack-up, low-impedance planes, and bulk decoupling near each transceiver bank. Quartus II software (the legacy IDE) or Intel Quartus Prime is required for synthesis, place-and-route, and bitstream generation.

This page synthesizes distributor stock and pricing, Arria II GX drop-in alternatives in the same 780-FBGA package, and practical PCB power/thermal design notes that go beyond the manufacturer datasheet.

Drop-in alternatives for EP2AGX190EF29I5G — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Variants in this series

Same-series models that are drop-in compatible with EP2AGX190EF29I5G (same form factor and footprint) — differing in Package, Family, Operating Temperature, Speed Grade, Mounting Type.

EP2AGX190EF29C4G

Intel

Package: 780-ball FCBGA, 29 mm

Operating Temperature: 0C to +85C (Commercial)

Speed Grade: C4