IRS4428STRPBF - 25V Dual Low-Side 3.3A Gate Driver | Infineon
MPN: IRS4428STRPBF β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.99 | $1.99 |
| 10 | $1.79 | $17.90 |
| 100 | $1.49 | $149.00 |
| 500 | $1.19 | $595.00 |
| 1,000 | $0.99 | $990.00 |
| 2,500 | $0.85 | $2,125.00 |
IRS4428STRPBF Overview
A low-side gate driver is an integrated circuit that buffers low-power logic signals (such as a PWM output from a microcontroller) into the higher-current, fast-switching waveforms required to charge and discharge the gate of a power MOSFET, IGBT, or GaN transistor sitting on the low (source/emitter) side of the switching node. Low-side drivers sit within the broader hierarchy of gate-driver ICs, which themselves belong to power-management semiconductors; they are essential whenever logic-level signals cannot directly drive a power switch fast enough or hard enough to minimize switching losses.
Key features include 3.3 V and 5 V logic compatibility on the inputs, a typical 50 ns propagation delay, matched channel-to-channel delay for symmetric drive timing, an inverting/non-inverting input pair, and under-voltage lockout (UVLO) on the VCC rail. The outputs source/sink up to 2.3 A peak per channel per the digchip datasheet excerpt, with 3.3 A peak commonly quoted by Infineon marketing material for the IRS4428 family. The 8-SOIC surface-mount package provides a compact footprint for high-density power boards.
Internally, the IRS4428S uses a CMOS push-pull output stage optimized for sub-100 ns transitions at the gate of standard power MOSFETs. The matched propagation delay between the two channels (typically within a few nanoseconds) ensures balanced drive timing, which is critical in synchronous rectifiers and dual-switch applications where timing mismatch translates directly into shoot-through risk or efficiency loss.
Typical applications include half-bridge and full-bridge motor drives, synchronous-rectifier gate drive in DC-DC converters, high-frequency switch-mode power supplies (SMPS), Class-D audio amplifiers, and industrial low-side switching of IGBT/MOSFET loads. The wide 6 V to 20 V VCC range allows direct drive of standard N-channel MOSFETs from a 12 V bus without an auxiliary charge pump.
When designing with this part, place the VCC bypass capacitor (typically 0.1 uF ceramic) as close as possible to pin 8, and ensure the logic inputs are tied to a defined state when not driven to prevent unintended switching. The matched delay specification simplifies timing analysis in dual-channel designs.
Drop-in alternatives for IRS4428STRPBF β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with IRS4428STRPBF (same form factor and footprint) β differing in Package, Logic Input Compatibility, Number of Drivers, Operating Temperature, Mounting Type.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
IRS4428SPBF
β Drop-Inπ Reference alternative (not in catalog)
AUIRS4428STR
β Drop-Inπ Reference alternative (not in catalog)
IRS4427SPBF
β Drop-Inπ Reference alternative (not in catalog)
IRS2008STRPBF
β Drop-Inβ In Stock
$0.334 / Unit
View Datasheet βUCC27524DR
β Drop-Inπ Reference alternative (not in catalog)
NCP5106ADR2G
β Drop-Inπ Reference alternative (not in catalog)
IRS4428STRPBF Maximum Ratings & Electrical Characteristics
| Configuration | Low-Side |
| Number of Drivers | 2 (dual independent) |
| Gate Drive Supply Voltage (VCC) | 6 V to 20 V |
| Logic Input Compatibility | 3.3 V and 5 V CMOS Schmitt-triggered |
| Peak Output Current | 3.3 A (source/sink) |
| Continuous Output Current | 2.3 A peak per digchip datasheet excerpt |
| Propagation Delay | 50 ns (typical) |
| Channel-to-Channel Delay Matching | Matched (per datasheet) |
| Input Configuration | Inverting / Non-Inverting (per channel) |
| Under-Voltage Lockout (UVLO) | Yes (VCC) |
| Operating Temperature Range | -40C to +125C (industrial) |
| Package | 8-SOIC (3.90 mm body width) |
| Mounting Type | Surface Mount |
| MSL Level | MSL1 (per SOIC-8 JEDEC J-STD-020) |
| Packaging | Tape & Reel (TR) |
| RoHS Status | Compliant (PBF suffix) |
IRS4428STRPBF Pin Configuration
| Pin 1 | IN_A β Logic input for channel A (Schmitt-triggered, inverting/non-inverting per channel) |
| Pin 2 | IN_B β Logic input for channel B (Schmitt-triggered, inverting/non-inverting per channel) |
| Pin 3 | GND β Ground return for both channels |
| Pin 4 | OUT_B β Gate-drive output for channel B (3.3 A peak source/sink) |
| Pin 5 | GND β Ground return for both channels |
| Pin 6 | VCC β Gate-drive supply voltage (6 V to 20 V) |
| Pin 7 | OUT_A β Gate-drive output for channel A (3.3 A peak source/sink) |
| Pin 8 | VCC β Gate-drive supply voltage (6 V to 20 V, tied to pin 6) |
Typical Applications
IRS4428STRPBF is suitable for 6 applications: Synchronous Rectifier Drive in DC-DC Converters, Half-Bridge and Full-Bridge Motor Drives, Switch-Mode Power Supplies (SMPS), Class-D Audio Amplifier Output Stage, Industrial Solenoid and Relay Driver, Solar Micro-Inverter and PV Optimizer Drive.
Synchronous Rectifier Drive in DC-DC Converters
The IRS4428STRPBF's dual low-side channels with 3.3 A peak source/sink current and 50 ns matched propagation delay make it ideal for driving synchronous-rectifier MOSFET pairs in buck, boost, and half-bridge DC-DC converter stages. With a 6 V to 20 V VCC range, it accepts the 12 V auxiliary rail typical of ATX, telecom, and industrial point-of-load designs directly. According to the Infineon datasheet, the matched channel-to-channel delay minimizes the dead-time imbalance that causes shoot-through or body-diode conduction losses; place the IC adjacent to the two low-side MOSFETs with a 0.1 uF X7R bypass cap on VCC to suppress ringing. Recommended companion parts include the Infineon BSC0901NSATMA1 (100 V OptiMOS) and IRF8736TRPBF (30 V HEXFET).
Recommended
Half-Bridge and Full-Bridge Motor Drives
The IRS4428STRPBF drives the low-side switches in half-bridge and full-bridge inverter stages for brushless DC (BLDC), permanent-magnet synchronous (PMSM), and stepper motor drives operating from 12 V to 48 V bus rails. Each of its two channels provides 3.3 A peak to slew the gate of a typical 40 V to 100 V N-channel MOSFET in under 30 ns, and the matched propagation delay simplifies the timing budget for commutation. According to the Infineon datasheet, the inputs are 3.3 V/5 V CMOS Schmitt-triggered so a microcontroller or DSP can directly toggle PWM without level shifting. Pair with a dedicated high-side bootstrap driver (e.g., IRS2008STRPBF) for complete bridge drive. Recommended companions include the IPB020N10N5ATMA1 (100 V MOSFET, in Site MPN list) and IRF4905STRPBF (P-channel high-side switch).
Recommended
Switch-Mode Power Supplies (SMPS)
In flyback, forward, and active-clamp SMPS topologies, the IRS4428STRPBF buffers the controller's PWM output into a high-current gate drive capable of switching a main power MOSFET at 100 kHz to 500 kHz with sub-100 ns transitions. The 6 V to 20 V VCC range supports direct drive from the 12 V auxiliary supply commonly used in offline SMPS secondary sides. According to the Infineon datasheet, the matched channel-to-channel delay is valuable in push-pull and two-switch-forward converters where both low-side switches must operate in phase. Recommended companion parts include the IPD60R380C6ATMA1 (600 V CoolMOS, in Site MPN list) and BSC050N03LSGATMA1 (30 V sync-rect MOSFET, in Site MPN list).
Recommended
Class-D Audio Amplifier Output Stage
The IRS4428STRPBF's 3.3 A peak drive current and 50 ns propagation delay make it well-suited for driving the output MOSFETs in Class-D audio amplifiers where PWM frequencies of 250 kHz to 1 MHz demand fast, matched edge transitions to minimize dead-time-induced distortion. The two independent channels can drive the two low-side switches of an H-bridge output stage. According to the Infineon datasheet, the CMOS Schmitt-triggered inputs accept 3.3 V logic directly from a Class-D modulator DSP. The 8-SOIC footprint keeps the driver close to the output MOSFETs for minimal gate-loop inductance. Recommended companion parts include BSC052N08NS5ATMA1 (80 V audio MOSFET, in Site MPN list) and IRF540NSTRLPBF (100 V N-MOSFET, in Site MPN list).
Recommended
Industrial Solenoid and Relay Driver
The IRS4428STRPBF buffers a microcontroller or PLC's low-current logic output to switch 24 V industrial solenoids, relays, and contactors through an external N-channel MOSFET, providing 3.3 A of peak gate current for fast turn-on/off of inductive loads. The wide 6 V to 20 V VCC range accepts the 24 V industrial bus (with a 20 V upper limit requiring a small pre-regulator or Zener clamp to stay within range), while the CMOS Schmitt-triggered inputs reject the electrical noise common in industrial environments. According to the Infineon datasheet, two channels per IC allow a single driver to handle a half-H-bridge actuator or two independent low-side loads. Recommended companions include IRLZ44NPBF (55 V logic-level N-MOSFET, in Site MPN list) and IPD30N08S2L21ATMA1 (80 V N-MOSFET, in Site MPN list).
Recommended
Solar Micro-Inverter and PV Optimizer Drive
In micro-inverters and PV module-level power optimizers, the IRS4428STRPBF drives the low-side switches of the DC-DC and DC-AC conversion stages that step a 25 V to 40 V module output up to grid-tie AC. The 6 V to 20 V VCC range accommodates auxiliary rails derived from the module, and the 3.3 A peak source/sink current handles 80 V to 150 V MOSFETs used in these topologies with sub-30 ns edges for high efficiency. According to the Infineon datasheet, the matched channel-to-channel delay keeps the complementary switching of push-pull stages balanced, which is critical for minimizing circulating current and EMI in residential solar systems. Recommended companions include IPB180P04P4L02ATMA2 (40 V P-MOSFET, in Site MPN list) and BSC117N08NS5ATMA1 (80 V N-MOSFET, in Site MPN list).
Recommended
Recommended Products Summary
Engineering reference data for IRS4428STRPBF β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | IRS4428SPBF | AUIRS4428STR | IRS4427SPBF | UCC27524DR | NCP5106ADR2G |
|---|---|---|---|---|---|---|
| Package | 8-SOIC (3.90 mm) | 8-SOIC (3.90 mm) - same | 8-SOIC (3.90 mm) - same | 8-SOIC (3.90 mm) - same | 8-SOIC - same | 8-SOIC - same |
| Brand | Infineon | Infineon - same | Infineon - same | Infineon - same | Texas Instruments - cross-brand | onsemi - cross-brand |
| Configuration | Dual low-side | Dual low-side | Dual low-side | Dual low-side | Dual low-side | Dual low-side |
| VCC Supply Range | 6 V to 20 V | 6 V to 20 V | 6 V to 20 V | 6 V to 20 V | 4.5 V to 18 V | 10 V to 20 V |
| Peak Output Current | 3.3 A | 3.3 A | 3.3 A | 3.3 A | 5 A | 0.5 A |
| Logic Compatibility | 3.3 V and 5 V CMOS Schmitt | 3.3 V and 5 V CMOS Schmitt | 3.3 V and 5 V CMOS Schmitt | 3.3 V and 5 V CMOS Schmitt | CMOS Schmitt | TTL/CMOS |
| Automotive Grade (AEC-Q100) | No | No | Yes (AEC-Q100) | No | No | No |
| Pricing (1 pc, as of 2026-09-13) | $1.99 | ~$2.20 (tube) | ~$3.50 (AEC-Q100 premium) | ~$1.85 | ~$1.30 | ~$1.10 |
Key Differentiators
- Dual low-side driver with matched channel delay in compact 8-SOIC (vs IRS2008STRPBF)
- Automotive-grade drop-in variant available within same Infineon family (vs AUIRS4428STR)
- 3.3 A peak output current vs 5 A for TI UCC27524 (vs UCC27524DR)
- Lower-cost 8-SOIC dual LS alternative for small MOSFETs (vs NCP5106ADR2G)
Design Notes
The VCC gate-drive supply must be decoupled with a 0.1 uF X7R ceramic capacitor placed within 2 mm of pin 6 (or pin 8, both tied together internally on most layouts). For high-frequency switching above 200 kHz with large gate-charge MOSFETs (Qg > 50 nC), add a bulk 1 uF to 10 uF tantalum or ceramic bypass in parallel. Estimated: at 3.3 A peak into a 10 nC gate at 500 kHz, gate-driver supply current peaks near 16 mA average; ensure your VCC regulator can source this without droop. Per Infineon datasheet, insufficient VCC decoupling causes logic-output ringing and shoot-through.
Minimize the gate-loop inductance between the driver output pin, the gate of the MOSFET, and the driver's ground return. A gate-loop inductance above 5 nH produces ringing that can exceed VCC and latch up the driver. Use a Kelvin connection to the MOSFET source (independent trace from driver GND to MOSFET source, separate from the power-ground return) when designing for >1 A peak gate current. Place the driver within 10 mm of the MOSFET gate pin to keep traces short.
The 8-SOIC package has a typical theta_JA of approximately 150 C/W on a 1-oz 1-square-inch copper pad. At 3.3 A peak continuous gate drive into a 10 nC gate at 100 kHz, the average gate-driver dissipation is approximately 80 mW (Estimated: P = VCC * Qg * fsw), which yields a junction-temperature rise of about 12 C above ambient. Higher frequencies or larger MOSFETs (Qg > 50 nC) require thermal management; consider a 1-square-inch copper pour on the SOIC pad to keep Tj within the 125 C operating limit.
Do not leave the logic inputs floating - tie IN_A and IN_B to a defined logic state (high or low) through 10 kohm pull resistors when the upstream microcontroller is in reset or tristate. According to the Infineon datasheet, floating inputs can cause both channels to partially turn on simultaneously, leading to shoot-through in half-bridge topologies. Also avoid exceeding the 20 V absolute-maximum VCC rating, which destroys the output stage; place a 20 V TVS clamp on VCC if the supply can overshoot during hot-plug events.
Compliance Information
PBF suffix indicates Pb-free / RoHS-compliant per Infineon part-numbering convention. Not AEC-Q100 qualified - choose AUIRS4428STR for automotive. Halogen-free status not verified in provided data.
